add support for the sparcv9-*-* target triple to turn on

64-bit sparc codegen.  Patch by Nathan Keynes!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95293 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/ADT/Triple.h

@@ -66,6 +66,7 @@ public:
     ppc,     // PPC: powerpc
     ppc64,   // PPC64: powerpc64, ppu
     sparc,   // Sparc: sparc
+    sparcv9, // Sparcv9: Sparcv9
     systemz, // SystemZ: s390x
     tce,     // TCE (http://tce.cs.tut.fi/): tce
     thumb,   // Thumb: thumb, thumbv.*

lib/Support/Triple.cpp

@@ -33,6 +33,7 @@ const char *Triple::getArchTypeName(ArchType Kind) {
   case ppc64:   return "powerpc64";
   case ppc:     return "powerpc";
   case sparc:   return "sparc";
+  case sparcv9: return "sparcv9";
   case systemz: return "s390x";
   case tce:     return "tce";
   case thumb:   return "thumb";
@@ -61,6 +62,7 @@ const char *Triple::getArchTypePrefix(ArchType Kind) {
   case ppc64:
   case ppc:     return "ppc";
 
+  case sparcv9:
   case sparc:   return "sparc";
 
   case x86:
@@ -127,6 +129,8 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
     return ppc;
   if (Name == "sparc")
     return sparc;
+  if (Name == "sparcv9")
+    return sparcv9;
   if (Name == "systemz")
     return systemz;
   if (Name == "tce")
@@ -250,6 +254,8 @@ void Triple::Parse() const {
     Arch = mipsel;
   else if (ArchName == "sparc")
     Arch = sparc;
+  else if (ArchName == "sparcv9")
+    Arch = sparcv9;
   else if (ArchName == "s390x")
     Arch = systemz;
   else if (ArchName == "tce")

lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp

@@ -199,4 +199,5 @@ bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
 // Force static initialization.
 extern "C" void LLVMInitializeSparcAsmPrinter() { 
   RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
+  RegisterAsmPrinter<SparcAsmPrinter> Y(TheSparcV9Target);
 }

lib/Target/Sparc/Sparc.h

@@ -29,6 +29,7 @@ namespace llvm {
   FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
 
   extern Target TheSparcTarget;
+  extern Target TheSparcV9Target;
 
 } // end namespace llvm;
 

lib/Target/Sparc/SparcSubtarget.cpp

@@ -15,29 +15,20 @@
 #include "SparcGenSubtarget.inc"
 using namespace llvm;
 
-// FIXME: temporary.
+SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &FS, 
-#include "llvm/Support/CommandLine.h"
+                               bool is64Bit) :
-namespace {
+  IsV9(false),
-  cl::opt<bool> EnableV9("enable-sparc-v9-insts", cl::Hidden,
+  V8DeprecatedInsts(false),
-                          cl::desc("Enable V9 instructions in the V8 target"));
+  IsVIS(false),
-}
+  Is64Bit(is64Bit) {
-
-SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &FS) {
-  // Set the default features.
-  IsV9 = false;
-  V8DeprecatedInsts = false;
-  IsVIS = false;
   
   // Determine default and user specified characteristics
-  std::string CPU = "generic";
+  const char *CPU = "v8";
-
+  if (is64Bit) {
-  // FIXME: autodetect host here!
+    CPU = "v9";
-  CPU = "v9";   // What is a good way to detect V9?
+    IsV9 = true;
+  }
 
   // Parse features string.
   ParseSubtargetFeatures(FS, CPU);
-
-  // Unless explicitly enabled, disable the V9 instructions.
-  if (!EnableV9)
-    IsV9 = false;
 }

lib/Target/Sparc/SparcSubtarget.h

@@ -23,8 +23,10 @@ class SparcSubtarget : public TargetSubtarget {
   bool IsV9;
   bool V8DeprecatedInsts;
   bool IsVIS;
+  bool Is64Bit;
+  
 public:
-  SparcSubtarget(const std::string &TT, const std::string &FS);
+  SparcSubtarget(const std::string &TT, const std::string &FS, bool is64bit);
 
   bool isV9() const { return IsV9; }
   bool isVIS() const { return IsVIS; }
@@ -35,6 +37,16 @@ public:
   std::string ParseSubtargetFeatures(const std::string &FS,
                                      const std::string &CPU);
   
+  bool is64Bit() const { return Is64Bit; }
+  std::string getDataLayout() const {
+    const char *p;
+    if (is64Bit()) {
+      p = "E-p:64:64:64-i64:64:64-f64:64:64-f128:128:128-n32:64";
+    } else {
+      p = "E-p:32:32:32-i64:64:64-f64:64:64-f128:64:64-n32";
+    }
+    return std::string(p);
+  }
 };
 
 } // end namespace llvm

lib/Target/Sparc/SparcTargetMachine.cpp

@@ -19,18 +19,22 @@ using namespace llvm;
 
 extern "C" void LLVMInitializeSparcTarget() {
   // Register the target.
-  RegisterTargetMachine<SparcTargetMachine> X(TheSparcTarget);
+  RegisterTargetMachine<SparcV8TargetMachine> X(TheSparcTarget);
-  RegisterAsmInfo<SparcELFMCAsmInfo> Y(TheSparcTarget);
+  RegisterTargetMachine<SparcV9TargetMachine> Y(TheSparcV9Target);
+
+  RegisterAsmInfo<SparcELFMCAsmInfo> A(TheSparcTarget);
+  RegisterAsmInfo<SparcELFMCAsmInfo> B(TheSparcV9Target);
 
 }
 
 /// SparcTargetMachine ctor - Create an ILP32 architecture model
 ///
 SparcTargetMachine::SparcTargetMachine(const Target &T, const std::string &TT, 
-                                       const std::string &FS)
+                                       const std::string &FS, bool is64bit)
   : LLVMTargetMachine(T, TT),
-    DataLayout("E-p:32:32-f128:128:128-n32"),
+    Subtarget(TT, FS, is64bit),
-    Subtarget(TT, FS), TLInfo(*this), InstrInfo(Subtarget),
+    DataLayout(Subtarget.getDataLayout()),
+     TLInfo(*this), InstrInfo(Subtarget),
     FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
 }
 
@@ -49,3 +53,15 @@ bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM,
   PM.add(createSparcDelaySlotFillerPass(*this));
   return true;
 }
+
+SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
+                                           const std::string &TT, 
+                                           const std::string &FS)
+  : SparcTargetMachine(T, TT, FS, false) {
+}
+
+SparcV9TargetMachine::SparcV9TargetMachine(const Target &T, 
+                                           const std::string &TT, 
+                                           const std::string &FS)
+  : SparcTargetMachine(T, TT, FS, true) {
+}

lib/Target/Sparc/SparcTargetMachine.h

@@ -24,14 +24,14 @@
 namespace llvm {
 
 class SparcTargetMachine : public LLVMTargetMachine {
-  const TargetData DataLayout;       // Calculates type size & alignment
   SparcSubtarget Subtarget;
+  const TargetData DataLayout;       // Calculates type size & alignment
   SparcTargetLowering TLInfo;
   SparcInstrInfo InstrInfo;
   TargetFrameInfo FrameInfo;
 public:
   SparcTargetMachine(const Target &T, const std::string &TT,
-                     const std::string &FS);
+                     const std::string &FS, bool is64bit);
 
   virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; }
   virtual const TargetFrameInfo  *getFrameInfo() const { return &FrameInfo; }
@@ -49,6 +49,22 @@ public:
   virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
 };
 
+/// SparcV8TargetMachine - Sparc 32-bit target machine
+///
+class SparcV8TargetMachine : public SparcTargetMachine {
+public:
+  SparcV8TargetMachine(const Target &T, const std::string &TT,
+                       const std::string &FS);
+};
+
+/// SparcV9TargetMachine - Sparc 64-bit target machine
+///
+class SparcV9TargetMachine : public SparcTargetMachine {
+public:
+  SparcV9TargetMachine(const Target &T, const std::string &TT,
+                       const std::string &FS);
+};
+
 } // end namespace llvm
 
 #endif

lib/Target/Sparc/TargetInfo/SparcTargetInfo.cpp

@@ -13,7 +13,9 @@
 using namespace llvm;
 
 Target llvm::TheSparcTarget;
+Target llvm::TheSparcV9Target;
 
 extern "C" void LLVMInitializeSparcTargetInfo() { 
   RegisterTarget<Triple::sparc> X(TheSparcTarget, "sparc", "Sparc");
+  RegisterTarget<Triple::sparcv9> Y(TheSparcV9Target, "sparcv9", "Sparc V9");
 }

test/CodeGen/SPARC/ctpop.ll

@@ -1,7 +1,5 @@
-; RUN: llc < %s -march=sparc -mattr=v9 -enable-sparc-v9-insts
+; RUN: llc < %s -march=sparc -mattr=-v9 | not grep popc
-; RUN: llc < %s -march=sparc -mattr=-v9 | \
+; RUN: llc < %s -march=sparcv9 -mattr=v9 | grep popc
-; RUN:   not grep popc
-; RUN: llc < %s -march=sparc -mattr=v9 -enable-sparc-v9-insts | grep popc
 
 declare i32 @llvm.ctpop.i32(i32)