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Handle implicit zext in a better way. Shamelessly stolen from x86 backend.

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Thanks for Dan Gohman for suggestion!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70782 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2009-05-03 15:50:18 +00:00
parent 2c4718bdd9
commit 87e3caf819
1 changed files with 16 additions and 0 deletions
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16
lib/Target/MSP430/MSP430InstrInfo.td
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@ -209,6 +209,22 @@ def MOVZX16rm8 : Pseudo<(outs GR16:$dst), (ins memsrc:$src),
"mov.b\t{$src, $dst}",
[(set GR16:$dst, (zextloadi16i8 addr:$src))]>;
// Any instruction that defines a 8-bit result leaves the high half of the
// register. Truncate can be lowered to EXTRACT_SUBREG, and CopyFromReg may
// be copying from a truncate, but any other 8-bit operation will zero-extend
// up to 16 bits.
def def8 : PatLeaf<(i8 GR8:$src), [{
return N->getOpcode() != ISD::TRUNCATE &&
N->getOpcode() != TargetInstrInfo::EXTRACT_SUBREG &&
N->getOpcode() != ISD::CopyFromReg;
}]>;
// In the case of a 8-bit def that is known to implicitly zero-extend,
// we can use a SUBREG_TO_REG.
def : Pat<(i16 (zext def8:$src)),
(SUBREG_TO_REG (i16 0), GR8:$src, subreg_8bit)>;
def MOV8mi : Pseudo<(outs), (ins memdst:$dst, i8imm:$src),
"mov.b\t{$src, $dst}",
[(store (i8 imm:$src), addr:$dst)]>;