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Fix a couple of the FIXMEs, thanks to suggestion from Chris. This allows
us to load and store vectors directly at a pointer (offset of zero) by using r0 as the base register. This also requires some asm printer work to satisfy the darwin assembler. For void %foo(<4 x float> * %a) { entry: %tmp1 = load <4 x float> * %a; %tmp2 = add <4 x float> %tmp1, %tmp1 store <4 x float> %tmp2, <4 x float> *%a ret void } We now produce: _foo: lvx v0, 0, r3 vaddfp v0, v0, v0 stvx v0, 0, r3 blr Instead of: _foo: li r2, 0 lvx v0, r2, r3 vaddfp v0, v0, v0 stvx v0, r2, r3 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24872 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -189,7 +189,14 @@ namespace {
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O << ')';
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}
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void printMemRegReg(const MachineInstr *MI, unsigned OpNo) {
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printOperand(MI, OpNo);
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// When used as the base register, r0 reads constant zero rather than
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// the value contained in the register. For this reason, the darwin
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// assembler requires that we print r0 as 0 (no r) when used as the base.
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const MachineOperand &MO = MI->getOperand(OpNo);
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if (MO.getReg() == PPC::R0)
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O << '0';
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else
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O << TM.getRegisterInfo()->get(MO.getReg()).Name;
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O << ", ";
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printOperand(MI, OpNo+1);
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}
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@ -454,8 +454,7 @@ bool PPCDAGToDAGISel::SelectAddrIdx(SDOperand N, SDOperand &Base,
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return true;
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}
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// FIXME: This should be a CopyFromReg R0 rather than a load of 0.
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Base = CurDAG->getTargetNode(PPC::LI, MVT::i32, getI32Imm(0));
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Base = CurDAG->getRegister(PPC::R0, MVT::i32);
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Index = Select(N);
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return true;
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}
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@ -470,8 +469,7 @@ bool PPCDAGToDAGISel::SelectAddrIdxOnly(SDOperand N, SDOperand &Base,
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return true;
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}
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// FIXME: This should be a CopyFromReg R0 rather than a load of 0.
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Base = CurDAG->getTargetNode(PPC::LI, MVT::i32, getI32Imm(0));
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Base = CurDAG->getRegister(PPC::R0, MVT::i32);
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Index = Select(N);
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return true;
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}
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