6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-09-26 09:18:56 +00:00
Code Issues Projects Releases Wiki Activity

Remove unused vector.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121741 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2010-12-14 00:58:47 +00:00
parent aca0da6876
commit 885b3283ea
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
lib/CodeGen/RegAllocGreedy.cpp
View File

@@ -273,7 +273,7 @@ unsigned RAGreedy::trySplit(LiveInterval &VirtReg, AllocationOrder &Order,
unsigned RAGreedy::selectOrSplit(LiveInterval &VirtReg,
SmallVectorImpl<LiveInterval*> &SplitVRegs) {
// Populate a list of physical register spill candidates.
SmallVector<unsigned, 8> PhysRegSpillCands, ReassignCands;
SmallVector<unsigned, 8> PhysRegSpillCands;
// Check for an available register in this class.
AllocationOrder Order(VirtReg.reg, *VRM, ReservedRegs);