6502/llvm-6502
1
0 Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2026-04-27 04:18:42 +00:00
Code Issues Projects Releases Wiki Activity

Improvement to the previous fix: branch following a delay slot of

Browse Source 
another delayed instr. would cause the later sanity-check (assertion)
in PhyRegAlloc.cpp to fail, even though there is really no error.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7848 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vikram S. Adve committed 2003-08-14 20:45:56 +00:00
1 parent 2925592230
commit 891bd82e79
2 files changed
+10 -6
Download Patch File Download Diff File Expand all files Collapse all files

No files matched your search

lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp
+5 -3
View File
@@ -290,9 +290,11 @@ void FunctionLiveVarInfo::calcLiveVarSetsForBB(const BasicBlock *BB) {
for (unsigned i = 0; i < DS; ++i, ++fwdMII) {
assert(fwdMII != MIVec.end() && "Missing instruction in delay slot?");
MachineInstr* DelaySlotMI = *fwdMII;
set_union(*MInst2LVSetBI[DelaySlotMI], *NewSet);
if (i+1 == DS)
set_union(*MInst2LVSetAI[DelaySlotMI], *NewSet);
if (! TM.getInstrInfo().isNop(DelaySlotMI->getOpCode())) {
set_union(*MInst2LVSetBI[DelaySlotMI], *NewSet);
if (i+1 == DS)
set_union(*MInst2LVSetAI[DelaySlotMI], *NewSet);
}
}
}
lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp
+5 -3
View File
@@ -290,9 +290,11 @@ void FunctionLiveVarInfo::calcLiveVarSetsForBB(const BasicBlock *BB) {
for (unsigned i = 0; i < DS; ++i, ++fwdMII) {
assert(fwdMII != MIVec.end() && "Missing instruction in delay slot?");
MachineInstr* DelaySlotMI = *fwdMII;
set_union(*MInst2LVSetBI[DelaySlotMI], *NewSet);
if (i+1 == DS)
set_union(*MInst2LVSetAI[DelaySlotMI], *NewSet);
if (! TM.getInstrInfo().isNop(DelaySlotMI->getOpCode())) {
set_union(*MInst2LVSetBI[DelaySlotMI], *NewSet);
if (i+1 == DS)
set_union(*MInst2LVSetAI[DelaySlotMI], *NewSet);
}
}
}