From 891bd82e7987ae2de55efa9f3a6089bc478d9686 Mon Sep 17 00:00:00 2001 From: "Vikram S. Adve" Date: Thu, 14 Aug 2003 20:45:56 +0000 Subject: [PATCH] Improvement to the previous fix: branch following a delay slot of another delayed instr. would cause the later sanity-check (assertion) in PhyRegAlloc.cpp to fail, even though there is really no error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7848 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp | 8 +++++--- lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp | 8 +++++--- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp b/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp index 8cde6e1de7a..764ec36f37f 100644 --- a/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp +++ b/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp @@ -290,9 +290,11 @@ void FunctionLiveVarInfo::calcLiveVarSetsForBB(const BasicBlock *BB) { for (unsigned i = 0; i < DS; ++i, ++fwdMII) { assert(fwdMII != MIVec.end() && "Missing instruction in delay slot?"); MachineInstr* DelaySlotMI = *fwdMII; - set_union(*MInst2LVSetBI[DelaySlotMI], *NewSet); - if (i+1 == DS) - set_union(*MInst2LVSetAI[DelaySlotMI], *NewSet); + if (! TM.getInstrInfo().isNop(DelaySlotMI->getOpCode())) { + set_union(*MInst2LVSetBI[DelaySlotMI], *NewSet); + if (i+1 == DS) + set_union(*MInst2LVSetAI[DelaySlotMI], *NewSet); + } } } diff --git a/lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp b/lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp index 8cde6e1de7a..764ec36f37f 100644 --- a/lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp +++ b/lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp @@ -290,9 +290,11 @@ void FunctionLiveVarInfo::calcLiveVarSetsForBB(const BasicBlock *BB) { for (unsigned i = 0; i < DS; ++i, ++fwdMII) { assert(fwdMII != MIVec.end() && "Missing instruction in delay slot?"); MachineInstr* DelaySlotMI = *fwdMII; - set_union(*MInst2LVSetBI[DelaySlotMI], *NewSet); - if (i+1 == DS) - set_union(*MInst2LVSetAI[DelaySlotMI], *NewSet); + if (! TM.getInstrInfo().isNop(DelaySlotMI->getOpCode())) { + set_union(*MInst2LVSetBI[DelaySlotMI], *NewSet); + if (i+1 == DS) + set_union(*MInst2LVSetAI[DelaySlotMI], *NewSet); + } } }