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Add some crude itin approximation for VFP load / stores on A9

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100671 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2010-04-07 18:22:03 +00:00
parent 67867135ec
commit 895867326e
1 changed files with 54 additions and 0 deletions
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54
lib/Target/ARM/ARMScheduleV7.td
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@ -804,6 +804,60 @@ def CortexA9Itineraries : ProcessorItineraries<[
InstrStage<2, [FU_DRegsN], 0, Reserved>,
InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<1, [FU_NPipe]>], [1, 1, 1]>,
//
// Single-precision FP Load
// use FU_Issue to enforce the 1 load/store per cycle limit
InstrItinData<IIC_fpLoad32, [InstrStage<1, [FU_DRegsVFP], 0, Required>,
InstrStage<2, [FU_DRegsN], 0, Reserved>,
InstrStage<1, [FU_Issue], 0>,
InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<1, [FU_LdSt0], 0>,
InstrStage<1, [FU_NPipe]>]>,
//
// Double-precision FP Load
// use FU_Issue to enforce the 1 load/store per cycle limit
InstrItinData<IIC_fpLoad64, [InstrStage<1, [FU_DRegsVFP], 0, Required>,
InstrStage<2, [FU_DRegsN], 0, Reserved>,
InstrStage<1, [FU_Issue], 0>,
InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<1, [FU_LdSt0], 0>,
InstrStage<1, [FU_NPipe]>]>,
//
// FP Load Multiple
// use FU_Issue to enforce the 1 load/store per cycle limit
InstrItinData<IIC_fpLoadm, [InstrStage<1, [FU_DRegsVFP], 0, Required>,
InstrStage<2, [FU_DRegsN], 0, Reserved>,
InstrStage<1, [FU_Issue], 0>,
InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<1, [FU_LdSt0], 0>,
InstrStage<1, [FU_NPipe]>]>,
//
// Single-precision FP Store
// use FU_Issue to enforce the 1 load/store per cycle limit
InstrItinData<IIC_fpStore32,[InstrStage<1, [FU_DRegsVFP], 0, Required>,
InstrStage<2, [FU_DRegsN], 0, Reserved>,
InstrStage<1, [FU_Issue], 0>,
InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<1, [FU_LdSt0], 0>,
InstrStage<1, [FU_NPipe]>]>,
//
// Double-precision FP Store
// use FU_Issue to enforce the 1 load/store per cycle limit
InstrItinData<IIC_fpStore64,[InstrStage<1, [FU_DRegsVFP], 0, Required>,
InstrStage<2, [FU_DRegsN], 0, Reserved>,
InstrStage<1, [FU_Issue], 0>,
InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<1, [FU_LdSt0], 0>,
InstrStage<1, [FU_NPipe]>]>,
//
// FP Store Multiple
// use FU_Issue to enforce the 1 load/store per cycle limit
InstrItinData<IIC_fpStorem, [InstrStage<1, [FU_DRegsVFP], 0, Required>,
InstrStage<2, [FU_DRegsN], 0, Reserved>,
InstrStage<1, [FU_Issue], 0>,
InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<1, [FU_LdSt0], 0>,
InstrStage<1, [FU_NPipe]>]>,
// NEON
// Issue through integer pipeline, and execute in NEON unit.
// FIXME: Neon pipeline and LdSt unit are multiplexed.