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[mips] Fix bug in parsing accumulator registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188344 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -861,8 +861,8 @@ int MipsAsmParser::matchFCCRegisterName(StringRef Name) {
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int MipsAsmParser::matchACRegisterName(StringRef Name) {
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if (Name.startswith("acc")) {
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StringRef NumString = Name.substr(3);
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if (Name.startswith("ac")) {
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StringRef NumString = Name.substr(2);
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unsigned IntVal;
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if (NumString.getAsInteger(10, IntVal))
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return -1; // This is not an integer.
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@ -22,6 +22,13 @@
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# CHECK: precr_sra_r.ph.w $25, $26, 0 # encoding: [0x7f,0x59,0x07,0xd1]
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# CHECK: precr_sra_r.ph.w $25, $26, 31 # encoding: [0x7f,0x59,0xff,0xd1]
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# CHECK: mult $ac3, $2, $3 # encoding: [0x00,0x43,0x18,0x18]
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# CHECK: multu $ac2, $4, $5 # encoding: [0x00,0x85,0x10,0x19]
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# CHECK: madd $ac1, $6, $7 # encoding: [0x70,0xc7,0x08,0x00]
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# CHECK: maddu $ac0, $8, $9 # encoding: [0x71,0x09,0x00,0x01]
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# CHECK: msub $ac3, $10, $11 # encoding: [0x71,0x4b,0x18,0x04]
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# CHECK: msubu $ac2, $12, $13 # encoding: [0x71,0x8d,0x10,0x05]
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precrq.qb.ph $16,$17,$18
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precrq.ph.w $17,$18,$19
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precrq_rs.ph.w $18,$19,$20
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@ -42,3 +49,10 @@
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precr_sra.ph.w $24,$25,31
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precr_sra_r.ph.w $25,$26,0
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precr_sra_r.ph.w $25,$26,31
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mult $ac3, $2, $3
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multu $ac2, $4, $5
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madd $ac1, $6, $7
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maddu $ac0, $8, $9
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msub $ac3, $10, $11
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msubu $ac2, $12, $13
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