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Remove the local register allocator.

Browse Source 
Please use the fast allocator instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106051 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-06-15 21:58:33 +00:00
parent bf37850e42
commit 8a3eab9b20
32 changed files with 16 additions and 1335 deletions
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26
docs/CodeGenerator.html
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@ -1594,22 +1594,22 @@ bool RegMapping_Fer::compatible_class(MachineFunction &mf,
different register allocators:</p>
<ul>
<li><i>Simple</i> &mdash; This is a very simple implementation that does not
keep values in registers across instructions. This register allocator
immediately spills every value right after it is computed, and reloads all
used operands from memory to temporary registers before each
instruction.</li>
<li><i>Local</i> &mdash; This register allocator is an improvement on the
<i>Simple</i> implementation. It allocates registers on a basic block
level, attempting to keep values in registers and reusing registers as
appropriate.</li>
<li><i>Linear Scan</i> &mdash; <i>The default allocator</i>. This is the
well-know linear scan register allocator. Whereas the
<i>Simple</i> and <i>Local</i> algorithms use a direct mapping
implementation technique, the <i>Linear Scan</i> implementation
uses a spiller in order to place load and stores.</li>
<li><i>Fast</i> &mdash; This register allocator is the default for debug
builds. It allocates registers on a basic block level, attempting to keep
values in registers and reusing registers as appropriate.</li>
<li><i>PBQP</i> &mdash; A Partitioned Boolean Quadratic Programming (PBQP)
based register allocator. This allocator works by constructing a PBQP
problem representing the register allocation problem under consideration,
solving this using a PBQP solver, and mapping the solution back to a
register assignment.</li>
</ul>
<p>The type of register allocator used in <tt>llc</tt> can be chosen with the
@ -1617,9 +1617,9 @@ bool RegMapping_Fer::compatible_class(MachineFunction &amp;mf,
<div class="doc_code">
<pre>
$ llc -regalloc=simple file.bc -o sp.s;
$ llc -regalloc=local file.bc -o lc.s;
$ llc -regalloc=linearscan file.bc -o ln.s;
$ llc -regalloc=fast file.bc -o fa.s;
$ llc -regalloc=pbqp file.bc -o pbqp.s;
</pre>
</div>

1
include/llvm/CodeGen/LinkAllCodegenComponents.h
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@ -33,7 +33,6 @@ namespace {
(void) llvm::createDeadMachineInstructionElimPass();
(void) llvm::createLocalRegisterAllocator();
(void) llvm::createFastRegisterAllocator();
(void) llvm::createLinearScanRegisterAllocator();
(void) llvm::createPBQPRegisterAllocator();

6
include/llvm/CodeGen/Passes.h
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@ -90,12 +90,6 @@ namespace llvm {
///
FunctionPass *createRegisterAllocator(CodeGenOpt::Level OptLevel);
/// LocalRegisterAllocation Pass - This pass register allocates the input code
/// a basic block at a time, yielding code better than the simple register
/// allocator, but not as good as a global allocator.
///
FunctionPass *createLocalRegisterAllocator();
/// FastRegisterAllocation Pass - This pass register allocates as fast as
/// possible. It is best suited for debug code where live ranges are short.
///

1
lib/CodeGen/CMakeLists.txt
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@ -52,7 +52,6 @@ add_llvm_library(LLVMCodeGen
PseudoSourceValue.cpp
RegAllocFast.cpp
RegAllocLinearScan.cpp
RegAllocLocal.cpp
RegAllocPBQP.cpp
RegisterCoalescer.cpp
RegisterScavenging.cpp

1254
lib/CodeGen/RegAllocLocal.cpp
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File diff suppressed because it is too large Load Diff

1
test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -mtriple=arm-linux-gnueabi -regalloc=local
; RUN: llc < %s -mtriple=arm-linux-gnueabi -regalloc=fast
; PR1925

1
test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=local
; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=fast
; PR1925

1
test/CodeGen/ARM/2009-05-07-RegAllocLocal.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -mtriple=armv5-unknown-linux-gnueabi -O0 -regalloc=local
; RUN: llc < %s -mtriple=armv5-unknown-linux-gnueabi -O0 -regalloc=fast
; PR4100
@.str = external constant [30 x i8] ; <[30 x i8]*> [#uses=1]

1
test/CodeGen/ARM/2010-05-18-LocalAllocCrash.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -O0 -verify-machineinstrs -regalloc=local
; RUN: llc < %s -O0 -verify-machineinstrs -regalloc=fast
; rdar://problem/7948106
;; This test would spill %R4 before the call to zz, but it forgot to move the

1
test/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -regalloc=local
; RUN: llc < %s -regalloc=fast
%struct.CHESS_POSITION = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32, i8, i8, [64 x i8], i8, i8, i8, i8, i8 }

1
test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
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@ -1,5 +1,4 @@
; RUN: llc < %s | FileCheck %s
; RUN: llc < %s -regalloc=local | FileCheck %s
; RUN: llc < %s -regalloc=fast | FileCheck %s
; The first argument of subfc must not be the same as any other register.

1
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -mtriple=powerpc64-apple-darwin9 -regalloc=local -relocation-model=pic
; RUN: llc < %s -mtriple=powerpc64-apple-darwin9 -regalloc=fast -relocation-model=pic
%struct.NSError = type opaque

1
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -mtriple=powerpc64-apple-darwin9 -regalloc=local -relocation-model=pic
; RUN: llc < %s -mtriple=powerpc64-apple-darwin9 -regalloc=fast -relocation-model=pic
%struct.NSError = type opaque

1
test/CodeGen/PowerPC/2008-02-09-LocalRegAllocAssert.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -mtriple=powerpc-apple-darwin -regalloc=local
; RUN: llc < %s -mtriple=powerpc-apple-darwin -regalloc=fast
define i32 @bork(i64 %foo, i64 %bar) {

1
test/CodeGen/PowerPC/cr_spilling.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -march=ppc32 -regalloc=local -O0 -relocation-model=pic -o -
; RUN: llc < %s -march=ppc32 -regalloc=fast -O0 -relocation-model=pic -o -
; PR1638

1
test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -regalloc=local -relocation-model=pic | FileCheck %s
; RUN: llc < %s -regalloc=fast -relocation-model=pic | FileCheck %s
target triple = "thumbv6-apple-darwin10"

1
test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -march=x86 -mattr=+sse2 -regalloc=local
; RUN: llc < %s -march=x86 -mattr=+sse2 -regalloc=fast
define void @SolveCubic(double %a, double %b, double %c, double %d, i32* %solutions, double* %x) {

1
test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -regalloc=local -march=x86 -mattr=+mmx | grep esi
; RUN: llc < %s -regalloc=fast -march=x86 -mattr=+mmx | grep esi
; PR2082
; Local register allocator was refusing to use ESI, EDI, and EBP so it ran out of

1
test/CodeGen/X86/2008-04-15-LiveVariableBug.ll
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@ -1,5 +1,4 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin
; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -disable-fp-elim -O0 -regalloc=local
; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -disable-fp-elim -O0 -regalloc=fast
; PR5534

1
test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -mtriple=i386-apple-darwin -regalloc=local
; RUN: llc < %s -mtriple=i386-apple-darwin -regalloc=fast
@_ZTVN10Evaluation10GridOutputILi3EEE = external constant [5 x i32 (...)*] ; <[5 x i32 (...)*]*> [#uses=1]

1
test/CodeGen/X86/2008-09-17-inline-asm-1.ll
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@ -1,5 +1,4 @@
; RUN: llc < %s -march=x86 | FileCheck %s
; RUN: llc < %s -march=x86 -regalloc=local | FileCheck %s
; RUN: llc < %s -march=x86 -regalloc=fast | FileCheck %s
; %0 must not be put in EAX or EDX.

1
test/CodeGen/X86/2008-09-18-inline-asm-2.ll
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@ -1,5 +1,4 @@
; RUN: llc < %s -march=x86 | grep "#%ebp %esi %edi 8(%edx) %eax (%ebx)"
; RUN: llc < %s -march=x86 -regalloc=local | grep "#%edi %ebp %edx 8(%ebx) %eax (%esi)"
; RUN: llc < %s -march=x86 -regalloc=fast | grep "#%edi %ebp %edx 8(%ebx) %eax (%esi)"
; The 1st, 2nd, 3rd and 5th registers above must all be different. The registers

1
test/CodeGen/X86/2009-01-29-LocalRegAllocBug.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -mtriple=i386-apple-darwin9.6 -regalloc=local -disable-fp-elim
; RUN: llc < %s -mtriple=i386-apple-darwin9.6 -regalloc=fast -disable-fp-elim
; rdar://6538384

1
test/CodeGen/X86/2009-04-14-IllegalRegs.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -mtriple=i386-apple-darwin -O0 -regalloc=local | not grep sil
; RUN: llc < %s -mtriple=i386-apple-darwin -O0 -regalloc=fast | not grep sil
; rdar://6787136

4
test/CodeGen/X86/2009-04-24.ll
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@ -1,6 +1,4 @@
; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -regalloc=local -relocation-model=pic > %t
; RUN: grep {leal.*TLSGD.*___tls_get_addr} %t
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=local -relocation-model=pic > %t2
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=fast -relocation-model=pic > %t2
; RUN: grep {leaq.*TLSGD.*__tls_get_addr} %t2
; PR4004

1
test/CodeGen/X86/2010-04-30-LocalAlloc-LandingPad.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -O0 -regalloc=local -relocation-model=pic -disable-fp-elim | FileCheck %s
; RUN: llc < %s -O0 -regalloc=fast -relocation-model=pic -disable-fp-elim | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
target triple = "i386-apple-darwin10.0.0"

1
test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll
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@ -1,4 +1,3 @@
; RUN-XFAIL: llc < %s -O0 -regalloc=local | FileCheck %s
; RUN: llc < %s -O0 -regalloc=fast | FileCheck %s
; PR6520

1
test/CodeGen/X86/2010-05-06-LocalInlineAsmClobber.ll
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@ -1,4 +1,3 @@
; RUN: llc -regalloc=local %s -o %t
; RUN: llc -regalloc=fast %s -o %t
; PR7066

1
test/CodeGen/X86/fp-stack-O0-crash.ll
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@ -1,4 +1,3 @@
; RUN: llc %s -O0 -fast-isel -regalloc=local -o -
; RUN: llc %s -O0 -fast-isel -regalloc=fast -o -
; PR4767

1
test/CodeGen/X86/liveness-local-regalloc.ll
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@ -1,4 +1,3 @@
; RUN: llc < %s -O3 -regalloc=local -mtriple=x86_64-apple-darwin10
; RUN: llc < %s -O3 -regalloc=fast -mtriple=x86_64-apple-darwin10
; <rdar://problem/7755473>

31
test/CodeGen/X86/local-liveness.ll
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@ -1,31 +0,0 @@
; RUN: llc < %s -march=x86 -regalloc=local | grep {subl %eax, %edx}
; Local regalloc shouldn't assume that both the uses of the
; sub instruction are kills, because one of them is tied
; to an output. Previously, it was allocating both inputs
; in the same register.
define i32 @func_3() nounwind {
entry:
%retval = alloca i32 ; <i32*> [#uses=2]
%g_323 = alloca i8 ; <i8*> [#uses=2]
%p_5 = alloca i64, align 8 ; <i64*> [#uses=2]
%0 = alloca i32 ; <i32*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
store i64 0, i64* %p_5, align 8
store i8 1, i8* %g_323, align 1
%1 = load i8* %g_323, align 1 ; <i8> [#uses=1]
%2 = sext i8 %1 to i64 ; <i64> [#uses=1]
%3 = load i64* %p_5, align 8 ; <i64> [#uses=1]
%4 = sub i64 %3, %2 ; <i64> [#uses=1]
%5 = icmp sge i64 %4, 0 ; <i1> [#uses=1]
%6 = zext i1 %5 to i32 ; <i32> [#uses=1]
store i32 %6, i32* %0, align 4
%7 = load i32* %0, align 4 ; <i32> [#uses=1]
store i32 %7, i32* %retval, align 4
br label %return
return: ; preds = %entry
%retval1 = load i32* %retval ; <i32> [#uses=1]
ret i32 %retval1
}

4
test/CodeGen/X86/phys-reg-local-regalloc.ll
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@ -1,5 +1,5 @@
; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 -regalloc=local | FileCheck %s
; RUN: llc -O0 < %s -march=x86 -mtriple=i386-apple-darwin9 -regalloc=local | FileCheck %s
; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 -regalloc=fast | FileCheck %s
; RUN: llc -O0 < %s -march=x86 -mtriple=i386-apple-darwin9 -regalloc=fast | FileCheck %s
; CHECKed instructions should be the same with or without -O0.
@.str = private constant [12 x i8] c"x + y = %i\0A\00", align 1 ; <[12 x i8]*> [#uses=1]