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Update comments about vector splat handling in x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137808 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4205,8 +4205,7 @@ static SDValue getLegalSplat(SelectionDAG &DAG, SDValue V, int EltNo) {
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return DAG.getNode(ISD::BITCAST, dl, VT, V);
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}
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/// PromoteSplat - Promote a splat of v4i32, v8i16 or v16i8 to v4f32 and
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/// v8i32, v16i16 or v32i8 to v8f32.
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/// PromoteSplat - Splat is promoted to target supported vector shuffles.
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static SDValue PromoteSplat(ShuffleVectorSDNode *SV, SelectionDAG &DAG) {
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EVT SrcVT = SV->getValueType(0);
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SDValue V1 = SV->getOperand(0);
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@ -4225,7 +4224,11 @@ static SDValue PromoteSplat(ShuffleVectorSDNode *SV, SelectionDAG &DAG) {
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EltNo -= NumElems/2;
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}
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// Make this 128-bit vector duplicate i8 and i16 elements
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// All i16 and i8 vector types can't be used directly by a generic shuffle
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// instruction because the target has no such instruction. Generate shuffles
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// which repeat i16 and i8 several times until they fit in i32, and then can
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// be manipulated by target suported shuffles. After the insertion of the
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// necessary shuffles, the result is bitcasted back to v4f32 or v8f32.
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EVT EltVT = SrcVT.getVectorElementType();
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if (NumElems > 4 && (EltVT == MVT::i8 || EltVT == MVT::i16))
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V1 = PromoteSplati8i16(V1, DAG, EltNo);
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@ -6175,11 +6178,7 @@ SDValue NormalizeVectorShuffle(SDValue Op, SelectionDAG &DAG,
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if (VT.is128BitVector() && NumElem <= 4)
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return SDValue();
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// All i16 and i8 vector types can't be used directly by a generic shuffle
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// instruction because the target has no such instruction. Generate shuffles
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// which repeat i16 and i8 several times until they fit in i32, and then can
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// be manipulated by target suported shuffles. After the insertion of the
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// necessary shuffles, the result is bitcasted back to v4f32 or v8f32.
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// All remaning splats are promoted to target supported vector shuffles.
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return PromoteSplat(SVOp, DAG);
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}
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