mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-01 00:33:09 +00:00
Alkis agrees that that iterative scan allocator isn't going to be worked on
in the future, remove it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23952 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
41e087c7e6
commit
8a6cd98e96
@ -18,7 +18,7 @@
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using namespace llvm;
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using namespace llvm;
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namespace {
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namespace {
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enum RegAllocName { simple, local, linearscan, iterativescan };
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enum RegAllocName { simple, local, linearscan };
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cl::opt<RegAllocName>
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cl::opt<RegAllocName>
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RegAlloc(
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RegAlloc(
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@ -29,7 +29,6 @@ namespace {
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clEnumVal(simple, " simple register allocator"),
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clEnumVal(simple, " simple register allocator"),
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clEnumVal(local, " local register allocator"),
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clEnumVal(local, " local register allocator"),
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clEnumVal(linearscan, " linear scan register allocator"),
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clEnumVal(linearscan, " linear scan register allocator"),
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clEnumVal(iterativescan, " iterative scan register allocator"),
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clEnumValEnd),
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clEnumValEnd),
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cl::init(linearscan));
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cl::init(linearscan));
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}
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}
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@ -45,8 +44,6 @@ FunctionPass *llvm::createRegisterAllocator() {
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return createLocalRegisterAllocator();
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return createLocalRegisterAllocator();
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case linearscan:
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case linearscan:
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return createLinearScanRegisterAllocator();
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return createLinearScanRegisterAllocator();
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case iterativescan:
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return createIterativeScanRegisterAllocator();
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}
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}
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}
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}
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@ -1,500 +0,0 @@
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//===-- RegAllocIterativeScan.cpp - Iterative Scan register allocator -----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements an iterative scan register
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// allocator. Iterative scan is a linear scan variant with the
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// following difference:
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//
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// It performs linear scan and keeps a list of the registers it cannot
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// allocate. It then spills all those registers and repeats the
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// process until allocation succeeds.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "regalloc"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/Target/MRegisterInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "PhysRegTracker.h"
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#include "VirtRegMap.h"
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#include <algorithm>
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#include <cmath>
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#include <set>
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using namespace llvm;
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namespace {
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Statistic<double> efficiency
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("regalloc", "Ratio of intervals processed over total intervals");
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static unsigned numIterations = 0;
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static unsigned numIntervals = 0;
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class RA : public MachineFunctionPass {
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private:
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MachineFunction* mf_;
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const TargetMachine* tm_;
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const MRegisterInfo* mri_;
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LiveIntervals* li_;
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bool *PhysRegsUsed;
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typedef std::vector<LiveInterval*> IntervalPtrs;
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IntervalPtrs unhandled_, fixed_, active_, inactive_, handled_, spilled_;
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std::auto_ptr<PhysRegTracker> prt_;
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std::auto_ptr<VirtRegMap> vrm_;
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std::auto_ptr<Spiller> spiller_;
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typedef std::vector<float> SpillWeights;
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SpillWeights spillWeights_;
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public:
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virtual const char* getPassName() const {
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return "Iterative Scan Register Allocator";
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<LiveIntervals>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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/// runOnMachineFunction - register allocate the whole function
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bool runOnMachineFunction(MachineFunction&);
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void releaseMemory();
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private:
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/// linearScan - the linear scan algorithm. Returns a boolean
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/// indicating if there were any spills
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bool linearScan();
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/// initIntervalSets - initializes the four interval sets:
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/// unhandled, fixed, active and inactive
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void initIntervalSets();
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/// processActiveIntervals - expire old intervals and move
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/// non-overlapping ones to the incative list
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void processActiveIntervals(IntervalPtrs::value_type cur);
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/// processInactiveIntervals - expire old intervals and move
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/// overlapping ones to the active list
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void processInactiveIntervals(IntervalPtrs::value_type cur);
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/// updateSpillWeights - updates the spill weights of the
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/// specifed physical register and its weight
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void updateSpillWeights(unsigned reg, SpillWeights::value_type weight);
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/// assignRegOrStackSlotAtInterval - assign a register if one
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/// is available, or spill.
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void assignRegOrSpillAtInterval(IntervalPtrs::value_type cur);
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///
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/// register handling helpers
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///
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/// getFreePhysReg - return a free physical register for this
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/// virtual register interval if we have one, otherwise return
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/// 0
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unsigned getFreePhysReg(IntervalPtrs::value_type cur);
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/// assignVirt2StackSlot - assigns this virtual register to a
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/// stack slot. returns the stack slot
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int assignVirt2StackSlot(unsigned virtReg);
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void printIntervals(const char* const str,
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RA::IntervalPtrs::const_iterator i,
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RA::IntervalPtrs::const_iterator e) const {
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if (str) std::cerr << str << " intervals:\n";
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for (; i != e; ++i) {
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std::cerr << "\t" << **i << " -> ";
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unsigned reg = (*i)->reg;
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if (MRegisterInfo::isVirtualRegister(reg)) {
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reg = vrm_->getPhys(reg);
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}
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std::cerr << mri_->getName(reg) << '\n';
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}
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}
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};
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}
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void RA::releaseMemory()
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{
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unhandled_.clear();
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fixed_.clear();
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active_.clear();
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inactive_.clear();
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handled_.clear();
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spilled_.clear();
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}
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bool RA::runOnMachineFunction(MachineFunction &fn) {
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mf_ = &fn;
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tm_ = &fn.getTarget();
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mri_ = tm_->getRegisterInfo();
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li_ = &getAnalysis<LiveIntervals>();
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PhysRegsUsed = new bool[mri_->getNumRegs()];
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std::fill(PhysRegsUsed, PhysRegsUsed+mri_->getNumRegs(), false);
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fn.setUsedPhysRegs(PhysRegsUsed);
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if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
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vrm_.reset(new VirtRegMap(*mf_));
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if (!spiller_.get()) spiller_.reset(createSpiller());
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initIntervalSets();
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numIntervals += li_->getNumIntervals();
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while (linearScan()) {
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// we spilled some registers, so we need to add intervals for
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// the spill code and restart the algorithm
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std::set<unsigned> spilledRegs;
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for (IntervalPtrs::iterator
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i = spilled_.begin(); i != spilled_.end(); ++i) {
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int slot = vrm_->assignVirt2StackSlot((*i)->reg);
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std::vector<LiveInterval*> added =
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li_->addIntervalsForSpills(**i, *vrm_, slot);
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std::copy(added.begin(), added.end(), std::back_inserter(handled_));
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spilledRegs.insert((*i)->reg);
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}
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spilled_.clear();
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for (IntervalPtrs::iterator
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i = handled_.begin(); i != handled_.end(); )
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if (spilledRegs.count((*i)->reg))
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i = handled_.erase(i);
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else
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++i;
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handled_.swap(unhandled_);
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vrm_->clearAllVirt();
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}
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efficiency = double(numIterations) / double(numIntervals);
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DEBUG(std::cerr << *vrm_);
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spiller_->runOnMachineFunction(*mf_, *vrm_);
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return true;
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}
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bool RA::linearScan()
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{
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// linear scan algorithm
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DEBUG(std::cerr << "********** LINEAR SCAN **********\n");
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DEBUG(std::cerr << "********** Function: "
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<< mf_->getFunction()->getName() << '\n');
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std::sort(unhandled_.begin(), unhandled_.end(),
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greater_ptr<LiveInterval>());
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DEBUG(printIntervals("unhandled", unhandled_.begin(), unhandled_.end()));
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DEBUG(printIntervals("fixed", fixed_.begin(), fixed_.end()));
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DEBUG(printIntervals("active", active_.begin(), active_.end()));
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DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
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while (!unhandled_.empty()) {
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// pick the interval with the earliest start point
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IntervalPtrs::value_type cur = unhandled_.back();
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unhandled_.pop_back();
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++numIterations;
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DEBUG(std::cerr << "\n*** CURRENT ***: " << *cur << '\n');
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processActiveIntervals(cur);
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processInactiveIntervals(cur);
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// if this register is fixed we are done
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if (MRegisterInfo::isPhysicalRegister(cur->reg)) {
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prt_->addRegUse(cur->reg);
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active_.push_back(cur);
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handled_.push_back(cur);
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}
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// otherwise we are allocating a virtual register. try to find
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// a free physical register or spill an interval in order to
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// assign it one (we could spill the current though).
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else {
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assignRegOrSpillAtInterval(cur);
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}
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DEBUG(printIntervals("active", active_.begin(), active_.end()));
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DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
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}
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// expire any remaining active intervals
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for (IntervalPtrs::reverse_iterator
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i = active_.rbegin(); i != active_.rend(); ) {
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unsigned reg = (*i)->reg;
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DEBUG(std::cerr << "\tinterval " << **i << " expired\n");
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if (MRegisterInfo::isVirtualRegister(reg))
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reg = vrm_->getPhys(reg);
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prt_->delRegUse(reg);
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i = IntervalPtrs::reverse_iterator(active_.erase(i.base()-1));
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}
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// expire any remaining inactive intervals
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for (IntervalPtrs::reverse_iterator
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i = inactive_.rbegin(); i != inactive_.rend(); ) {
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DEBUG(std::cerr << "\tinterval " << **i << " expired\n");
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i = IntervalPtrs::reverse_iterator(inactive_.erase(i.base()-1));
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}
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// return true if we spilled anything
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return !spilled_.empty();
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}
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void RA::initIntervalSets() {
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assert(unhandled_.empty() && fixed_.empty() &&
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active_.empty() && inactive_.empty() &&
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"interval sets should be empty on initialization");
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for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i){
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unhandled_.push_back(&i->second);
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if (MRegisterInfo::isPhysicalRegister(i->second.reg)) {
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PhysRegsUsed[i->second.reg] = true;
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fixed_.push_back(&i->second);
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}
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}
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}
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void RA::processActiveIntervals(IntervalPtrs::value_type cur)
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{
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DEBUG(std::cerr << "\tprocessing active intervals:\n");
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IntervalPtrs::iterator ii = active_.begin(), ie = active_.end();
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while (ii != ie) {
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LiveInterval* i = *ii;
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unsigned reg = i->reg;
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// remove expired intervals
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if (i->expiredAt(cur->beginNumber())) {
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DEBUG(std::cerr << "\t\tinterval " << *i << " expired\n");
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if (MRegisterInfo::isVirtualRegister(reg))
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reg = vrm_->getPhys(reg);
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prt_->delRegUse(reg);
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// swap with last element and move end iterator back one position
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std::iter_swap(ii, --ie);
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}
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// move inactive intervals to inactive list
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else if (!i->liveAt(cur->beginNumber())) {
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DEBUG(std::cerr << "\t\tinterval " << *i << " inactive\n");
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if (MRegisterInfo::isVirtualRegister(reg))
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reg = vrm_->getPhys(reg);
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prt_->delRegUse(reg);
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// add to inactive
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inactive_.push_back(i);
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// swap with last element and move end iterator back one postion
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std::iter_swap(ii, --ie);
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}
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else {
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++ii;
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}
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}
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active_.erase(ie, active_.end());
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}
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void RA::processInactiveIntervals(IntervalPtrs::value_type cur)
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{
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DEBUG(std::cerr << "\tprocessing inactive intervals:\n");
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IntervalPtrs::iterator ii = inactive_.begin(), ie = inactive_.end();
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while (ii != ie) {
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LiveInterval* i = *ii;
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unsigned reg = i->reg;
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// remove expired intervals
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if (i->expiredAt(cur->beginNumber())) {
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DEBUG(std::cerr << "\t\tinterval " << *i << " expired\n");
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// swap with last element and move end iterator back one position
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std::iter_swap(ii, --ie);
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}
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// move re-activated intervals in active list
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else if (i->liveAt(cur->beginNumber())) {
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DEBUG(std::cerr << "\t\tinterval " << *i << " active\n");
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if (MRegisterInfo::isVirtualRegister(reg))
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reg = vrm_->getPhys(reg);
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prt_->addRegUse(reg);
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// add to active
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active_.push_back(i);
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// swap with last element and move end iterator back one position
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std::iter_swap(ii, --ie);
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}
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else {
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++ii;
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}
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}
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inactive_.erase(ie, inactive_.end());
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}
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void RA::updateSpillWeights(unsigned reg, SpillWeights::value_type weight)
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{
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spillWeights_[reg] += weight;
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for (const unsigned* as = mri_->getAliasSet(reg); *as; ++as)
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spillWeights_[*as] += weight;
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}
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void RA::assignRegOrSpillAtInterval(IntervalPtrs::value_type cur)
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{
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DEBUG(std::cerr << "\tallocating current interval: ");
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PhysRegTracker backupPrt = *prt_;
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spillWeights_.assign(mri_->getNumRegs(), 0.0);
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// for each interval in active update spill weights
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||||||
for (IntervalPtrs::const_iterator i = active_.begin(), e = active_.end();
|
|
||||||
i != e; ++i) {
|
|
||||||
unsigned reg = (*i)->reg;
|
|
||||||
if (MRegisterInfo::isVirtualRegister(reg))
|
|
||||||
reg = vrm_->getPhys(reg);
|
|
||||||
updateSpillWeights(reg, (*i)->weight);
|
|
||||||
}
|
|
||||||
|
|
||||||
// for every interval in inactive we overlap with, mark the
|
|
||||||
// register as not free and update spill weights
|
|
||||||
for (IntervalPtrs::const_iterator i = inactive_.begin(),
|
|
||||||
e = inactive_.end(); i != e; ++i) {
|
|
||||||
if (cur->overlaps(**i)) {
|
|
||||||
unsigned reg = (*i)->reg;
|
|
||||||
if (MRegisterInfo::isVirtualRegister(reg))
|
|
||||||
reg = vrm_->getPhys(reg);
|
|
||||||
prt_->addRegUse(reg);
|
|
||||||
updateSpillWeights(reg, (*i)->weight);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
// for every interval in fixed we overlap with,
|
|
||||||
// mark the register as not free and update spill weights
|
|
||||||
for (IntervalPtrs::const_iterator i = fixed_.begin(),
|
|
||||||
e = fixed_.end(); i != e; ++i) {
|
|
||||||
if (cur->overlaps(**i)) {
|
|
||||||
unsigned reg = (*i)->reg;
|
|
||||||
prt_->addRegUse(reg);
|
|
||||||
updateSpillWeights(reg, (*i)->weight);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
unsigned physReg = getFreePhysReg(cur);
|
|
||||||
// restore the physical register tracker
|
|
||||||
*prt_ = backupPrt;
|
|
||||||
// if we find a free register, we are done: assign this virtual to
|
|
||||||
// the free physical register and add this interval to the active
|
|
||||||
// list.
|
|
||||||
if (physReg) {
|
|
||||||
DEBUG(std::cerr << mri_->getName(physReg) << '\n');
|
|
||||||
vrm_->assignVirt2Phys(cur->reg, physReg);
|
|
||||||
prt_->addRegUse(physReg);
|
|
||||||
active_.push_back(cur);
|
|
||||||
handled_.push_back(cur);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
DEBUG(std::cerr << "no free registers\n");
|
|
||||||
|
|
||||||
DEBUG(std::cerr << "\tassigning stack slot at interval "<< *cur << ":\n");
|
|
||||||
|
|
||||||
float minWeight = (float)HUGE_VAL;
|
|
||||||
unsigned minReg = 0;
|
|
||||||
const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
|
|
||||||
for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_),
|
|
||||||
e = rc->allocation_order_end(*mf_); i != e; ++i) {
|
|
||||||
unsigned reg = *i;
|
|
||||||
if (minWeight > spillWeights_[reg]) {
|
|
||||||
minWeight = spillWeights_[reg];
|
|
||||||
minReg = reg;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
DEBUG(std::cerr << "\t\tregister with min weight: "
|
|
||||||
<< mri_->getName(minReg) << " (" << minWeight << ")\n");
|
|
||||||
|
|
||||||
// if the current has the minimum weight, we spill it and move on
|
|
||||||
if (cur->weight <= minWeight) {
|
|
||||||
DEBUG(std::cerr << "\t\t\tspilling(c): " << *cur << '\n');
|
|
||||||
spilled_.push_back(cur);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
// otherwise we spill all intervals aliasing the register with
|
|
||||||
// minimum weight, assigned the newly cleared register to the
|
|
||||||
// current interval and continue
|
|
||||||
assert(MRegisterInfo::isPhysicalRegister(minReg) &&
|
|
||||||
"did not choose a register to spill?");
|
|
||||||
std::vector<bool> toSpill(mri_->getNumRegs(), false);
|
|
||||||
toSpill[minReg] = true;
|
|
||||||
for (const unsigned* as = mri_->getAliasSet(minReg); *as; ++as)
|
|
||||||
toSpill[*as] = true;
|
|
||||||
unsigned earliestStart = cur->beginNumber();
|
|
||||||
|
|
||||||
std::set<unsigned> spilled;
|
|
||||||
|
|
||||||
for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ) {
|
|
||||||
unsigned reg = (*i)->reg;
|
|
||||||
if (MRegisterInfo::isVirtualRegister(reg) &&
|
|
||||||
toSpill[vrm_->getPhys(reg)] &&
|
|
||||||
cur->overlaps(**i)) {
|
|
||||||
DEBUG(std::cerr << "\t\t\tspilling(a): " << **i << '\n');
|
|
||||||
spilled_.push_back(*i);
|
|
||||||
prt_->delRegUse(vrm_->getPhys(reg));
|
|
||||||
vrm_->clearVirt(reg);
|
|
||||||
i = active_.erase(i);
|
|
||||||
}
|
|
||||||
else
|
|
||||||
++i;
|
|
||||||
}
|
|
||||||
for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end(); ) {
|
|
||||||
unsigned reg = (*i)->reg;
|
|
||||||
if (MRegisterInfo::isVirtualRegister(reg) &&
|
|
||||||
toSpill[vrm_->getPhys(reg)] &&
|
|
||||||
cur->overlaps(**i)) {
|
|
||||||
DEBUG(std::cerr << "\t\t\tspilling(i): " << **i << '\n');
|
|
||||||
spilled_.push_back(*i);
|
|
||||||
vrm_->clearVirt(reg);
|
|
||||||
i = inactive_.erase(i);
|
|
||||||
}
|
|
||||||
else
|
|
||||||
++i;
|
|
||||||
}
|
|
||||||
|
|
||||||
vrm_->assignVirt2Phys(cur->reg, minReg);
|
|
||||||
prt_->addRegUse(minReg);
|
|
||||||
active_.push_back(cur);
|
|
||||||
handled_.push_back(cur);
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
unsigned RA::getFreePhysReg(LiveInterval* cur)
|
|
||||||
{
|
|
||||||
std::vector<unsigned> inactiveCounts(mri_->getNumRegs(), 0);
|
|
||||||
for (IntervalPtrs::iterator i = inactive_.begin(), e = inactive_.end();
|
|
||||||
i != e; ++i) {
|
|
||||||
unsigned reg = (*i)->reg;
|
|
||||||
if (MRegisterInfo::isVirtualRegister(reg))
|
|
||||||
reg = vrm_->getPhys(reg);
|
|
||||||
++inactiveCounts[reg];
|
|
||||||
}
|
|
||||||
|
|
||||||
const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
|
|
||||||
|
|
||||||
unsigned freeReg = 0;
|
|
||||||
for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_),
|
|
||||||
e = rc->allocation_order_end(*mf_); i != e; ++i) {
|
|
||||||
unsigned reg = *i;
|
|
||||||
if (prt_->isRegAvail(reg) &&
|
|
||||||
(!freeReg || inactiveCounts[freeReg] < inactiveCounts[reg]))
|
|
||||||
freeReg = reg;
|
|
||||||
}
|
|
||||||
return freeReg;
|
|
||||||
}
|
|
||||||
|
|
||||||
FunctionPass* llvm::createIterativeScanRegisterAllocator() {
|
|
||||||
return new RA();
|
|
||||||
}
|
|
||||||
Loading…
Reference in New Issue
Block a user