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AVX-512: changed intrinsics for mask operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196918 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Elena Demikhovsky
parent
89458ced87
commit
8a8581ca4b
@ -2643,37 +2643,30 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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// Mask instructions
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// 16-bit mask
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def int_x86_kadd_v16i1 : GCCBuiltin<"__builtin_ia32_kaddw">,
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Intrinsic<[llvm_v16i1_ty], [llvm_v16i1_ty, llvm_v16i1_ty],
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def int_x86_avx512_kand_w : GCCBuiltin<"__builtin_ia32_kandhi">,
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Intrinsic<[llvm_i16_ty], [llvm_i16_ty, llvm_i16_ty],
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[IntrNoMem]>;
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def int_x86_kand_v16i1 : GCCBuiltin<"__builtin_ia32_kandw">,
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Intrinsic<[llvm_v16i1_ty], [llvm_v16i1_ty, llvm_v16i1_ty],
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def int_x86_avx512_kandn_w : GCCBuiltin<"__builtin_ia32_kandnhi">,
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Intrinsic<[llvm_i16_ty], [llvm_i16_ty, llvm_i16_ty],
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[IntrNoMem]>;
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def int_x86_kandn_v16i1 : GCCBuiltin<"__builtin_ia32_kandnw">,
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Intrinsic<[llvm_v16i1_ty], [llvm_v16i1_ty, llvm_v16i1_ty],
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def int_x86_avx512_knot_w : GCCBuiltin<"__builtin_ia32_knothi">,
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Intrinsic<[llvm_i16_ty], [llvm_i16_ty], [IntrNoMem]>;
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def int_x86_avx512_kor_w : GCCBuiltin<"__builtin_ia32_korhi">,
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Intrinsic<[llvm_i16_ty], [llvm_i16_ty, llvm_i16_ty],
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[IntrNoMem]>;
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def int_x86_knot_v16i1 : GCCBuiltin<"__builtin_ia32_knotw">,
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Intrinsic<[llvm_v16i1_ty], [llvm_v16i1_ty], [IntrNoMem]>;
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def int_x86_kor_v16i1 : GCCBuiltin<"__builtin_ia32_korw">,
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Intrinsic<[llvm_v16i1_ty], [llvm_v16i1_ty, llvm_v16i1_ty],
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def int_x86_avx512_kxor_w : GCCBuiltin<"__builtin_ia32_kxorhi">,
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Intrinsic<[llvm_i16_ty], [llvm_i16_ty, llvm_i16_ty],
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[IntrNoMem]>;
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def int_x86_kxor_v16i1 : GCCBuiltin<"__builtin_ia32_kxorw">,
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Intrinsic<[llvm_v16i1_ty], [llvm_v16i1_ty, llvm_v16i1_ty],
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def int_x86_avx512_kxnor_w : GCCBuiltin<"__builtin_ia32_kxnorhi">,
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Intrinsic<[llvm_i16_ty], [llvm_i16_ty, llvm_i16_ty],
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[IntrNoMem]>;
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def int_x86_kxnor_v16i1 : GCCBuiltin<"__builtin_ia32_kxnorw">,
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Intrinsic<[llvm_v16i1_ty], [llvm_v16i1_ty, llvm_v16i1_ty],
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def int_x86_avx512_kunpck_bw : GCCBuiltin<"__builtin_ia32_kunpckhi">,
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Intrinsic<[llvm_i16_ty], [llvm_i16_ty, llvm_i16_ty],
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[IntrNoMem]>;
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def int_x86_mask2int_v16i1 : GCCBuiltin<"__builtin_ia32_mask2intw">,
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Intrinsic<[llvm_i32_ty], [llvm_v16i1_ty], [IntrNoMem]>;
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def int_x86_int2mask_v16i1 : GCCBuiltin<"__builtin_ia32_int2maskw">,
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Intrinsic<[llvm_v16i1_ty], [llvm_i32_ty], [IntrNoMem]>;
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def int_x86_kunpck_v16i1 : GCCBuiltin<"__builtin_ia32_kunpckbw">,
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Intrinsic<[llvm_v16i1_ty], [llvm_v8i1_ty, llvm_v8i1_ty],
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[IntrNoMem]>;
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def int_x86_avx512_kortestz : GCCBuiltin<"__builtin_ia32_kortestz">,
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def int_x86_avx512_kortestz_w : GCCBuiltin<"__builtin_ia32_kortestzhi">,
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Intrinsic<[llvm_i32_ty], [llvm_i16_ty, llvm_i16_ty],
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[IntrNoMem]>;
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def int_x86_avx512_kortestc : GCCBuiltin<"__builtin_ia32_kortestc">,
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def int_x86_avx512_kortestc_w : GCCBuiltin<"__builtin_ia32_kortestchi">,
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Intrinsic<[llvm_i32_ty], [llvm_i16_ty, llvm_i16_ty],
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[IntrNoMem]>;
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}
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@ -11490,9 +11490,9 @@ static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) {
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SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, CC, Test);
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return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);
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}
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case Intrinsic::x86_avx512_kortestz:
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case Intrinsic::x86_avx512_kortestc: {
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unsigned X86CC = (IntNo == Intrinsic::x86_avx512_kortestz)? X86::COND_E: X86::COND_B;
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case Intrinsic::x86_avx512_kortestz_w:
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case Intrinsic::x86_avx512_kortestc_w: {
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unsigned X86CC = (IntNo == Intrinsic::x86_avx512_kortestz_w)? X86::COND_E: X86::COND_B;
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SDValue LHS = DAG.getNode(ISD::BITCAST, dl, MVT::v16i1, Op.getOperand(1));
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SDValue RHS = DAG.getNode(ISD::BITCAST, dl, MVT::v16i1, Op.getOperand(2));
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SDValue CC = DAG.getConstant(X86CC, MVT::i8);
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@ -898,6 +898,15 @@ multiclass avx512_mask_unop_w<bits<8> opc, string OpcodeStr,
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defm KNOT : avx512_mask_unop_w<0x44, "knot", not>;
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multiclass avx512_mask_unop_int<string IntName, string InstName> {
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let Predicates = [HasAVX512] in
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def : Pat<(!cast<Intrinsic>("int_x86_avx512_"##IntName##"_w")
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(i16 GR16:$src)),
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(COPY_TO_REGCLASS (!cast<Instruction>(InstName##"Wrr")
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(v16i1 (COPY_TO_REGCLASS GR16:$src, VK16))), GR16)>;
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}
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defm : avx512_mask_unop_int<"knot", "KNOT">;
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def : Pat<(xor VK16:$src1, (v16i1 immAllOnesV)), (KNOTWrr VK16:$src1)>;
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def : Pat<(xor VK8:$src1, (v8i1 immAllOnesV)),
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(COPY_TO_REGCLASS (KNOTWrr (COPY_TO_REGCLASS VK8:$src1, VK16)), VK8)>;
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@ -908,7 +917,7 @@ def : Pat<(not VK8:$src),
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(KNOTWrr (COPY_TO_REGCLASS VK8:$src, VK16)), VK8)>;
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// Mask binary operation
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// - KADD, KAND, KANDN, KOR, KXNOR, KXOR
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// - KAND, KANDN, KOR, KXNOR, KXOR
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multiclass avx512_mask_binop<bits<8> opc, string OpcodeStr,
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RegisterClass KRC, SDPatternOperator OpNode> {
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let Predicates = [HasAVX512] in
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@ -928,7 +937,6 @@ def andn : PatFrag<(ops node:$i0, node:$i1), (and (not node:$i0), node:$i1)>;
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def xnor : PatFrag<(ops node:$i0, node:$i1), (not (xor node:$i0, node:$i1))>;
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let isCommutable = 1 in {
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defm KADD : avx512_mask_binop_w<0x4a, "kadd", add>;
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defm KAND : avx512_mask_binop_w<0x41, "kand", and>;
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let isCommutable = 0 in
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defm KANDN : avx512_mask_binop_w<0x42, "kandn", andn>;
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@ -939,17 +947,19 @@ let isCommutable = 1 in {
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multiclass avx512_mask_binop_int<string IntName, string InstName> {
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let Predicates = [HasAVX512] in
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def : Pat<(!cast<Intrinsic>("int_x86_"##IntName##"_v16i1")
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VK16:$src1, VK16:$src2),
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(!cast<Instruction>(InstName##"Wrr") VK16:$src1, VK16:$src2)>;
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def : Pat<(!cast<Intrinsic>("int_x86_avx512_"##IntName##"_w")
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(i16 GR16:$src1), (i16 GR16:$src2)),
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(COPY_TO_REGCLASS (!cast<Instruction>(InstName##"Wrr")
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(v16i1 (COPY_TO_REGCLASS GR16:$src1, VK16)),
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(v16i1 (COPY_TO_REGCLASS GR16:$src2, VK16))), GR16)>;
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}
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defm : avx512_mask_binop_int<"kadd", "KADD">;
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defm : avx512_mask_binop_int<"kand", "KAND">;
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defm : avx512_mask_binop_int<"kandn", "KANDN">;
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defm : avx512_mask_binop_int<"kor", "KOR">;
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defm : avx512_mask_binop_int<"kxnor", "KXNOR">;
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defm : avx512_mask_binop_int<"kxor", "KXOR">;
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// With AVX-512, 8-bit mask is promoted to 16-bit mask.
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multiclass avx512_binop_pat<SDPatternOperator OpNode, Instruction Inst> {
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let Predicates = [HasAVX512] in
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@ -967,15 +977,15 @@ defm : avx512_binop_pat<xor, KXORWrr>;
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// Mask unpacking
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multiclass avx512_mask_unpck<bits<8> opc, string OpcodeStr,
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RegisterClass KRC1, RegisterClass KRC2> {
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RegisterClass KRC> {
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let Predicates = [HasAVX512] in
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def rr : I<opc, MRMSrcReg, (outs KRC1:$dst), (ins KRC2:$src1, KRC2:$src2),
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def rr : I<opc, MRMSrcReg, (outs KRC:$dst), (ins KRC:$src1, KRC:$src2),
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!strconcat(OpcodeStr,
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"\t{$src2, $src1, $dst|$dst, $src1, $src2}"), []>;
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}
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multiclass avx512_mask_unpck_bw<bits<8> opc, string OpcodeStr> {
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defm BW : avx512_mask_unpck<opc, !strconcat(OpcodeStr, "bw"), VK16, VK8>,
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defm BW : avx512_mask_unpck<opc, !strconcat(OpcodeStr, "bw"), VK16>,
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VEX_4V, VEX_L, OpSize, TB;
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}
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@ -983,12 +993,14 @@ defm KUNPCK : avx512_mask_unpck_bw<0x4b, "kunpck">;
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multiclass avx512_mask_unpck_int<string IntName, string InstName> {
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let Predicates = [HasAVX512] in
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def : Pat<(!cast<Intrinsic>("int_x86_"##IntName##"_v16i1")
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VK8:$src1, VK8:$src2),
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(!cast<Instruction>(InstName##"BWrr") VK8:$src1, VK8:$src2)>;
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def : Pat<(!cast<Intrinsic>("int_x86_avx512_"##IntName##"_bw")
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(i16 GR16:$src1), (i16 GR16:$src2)),
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(COPY_TO_REGCLASS (!cast<Instruction>(InstName##"BWrr")
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(v16i1 (COPY_TO_REGCLASS GR16:$src1, VK16)),
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(v16i1 (COPY_TO_REGCLASS GR16:$src2, VK16))), GR16)>;
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}
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defm : avx512_mask_unpck_int<"kunpck", "KUNPCK">;
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defm : avx512_mask_unpck_int<"kunpck", "KUNPCK">;
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// Mask bit testing
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multiclass avx512_mask_testop<bits<8> opc, string OpcodeStr, RegisterClass KRC,
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SDNode OpNode> {
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@ -1,23 +1,51 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
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declare i32 @llvm.x86.avx512.kortestz(i16, i16) nounwind readnone
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; CHECK: test_kortestz
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declare i32 @llvm.x86.avx512.kortestz.w(i16, i16) nounwind readnone
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; CHECK-LABEL: test_kortestz
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; CHECK: kortestw
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; CHECK: sete
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define i32 @test_kortestz(i16 %a0, i16 %a1) {
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%res = call i32 @llvm.x86.avx512.kortestz(i16 %a0, i16 %a1)
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%res = call i32 @llvm.x86.avx512.kortestz.w(i16 %a0, i16 %a1)
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ret i32 %res
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}
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declare i32 @llvm.x86.avx512.kortestc(i16, i16) nounwind readnone
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; CHECK: test_kortestc
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declare i32 @llvm.x86.avx512.kortestc.w(i16, i16) nounwind readnone
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; CHECK-LABEL: test_kortestc
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; CHECK: kortestw
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; CHECK: sbbl
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define i32 @test_kortestc(i16 %a0, i16 %a1) {
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%res = call i32 @llvm.x86.avx512.kortestc(i16 %a0, i16 %a1)
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%res = call i32 @llvm.x86.avx512.kortestc.w(i16 %a0, i16 %a1)
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ret i32 %res
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}
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declare i16 @llvm.x86.avx512.kand.w(i16, i16) nounwind readnone
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; CHECK-LABEL: test_kand
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; CHECK: kandw
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; CHECK: kandw
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define i16 @test_kand(i16 %a0, i16 %a1) {
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%t1 = call i16 @llvm.x86.avx512.kand.w(i16 %a0, i16 8)
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%t2 = call i16 @llvm.x86.avx512.kand.w(i16 %t1, i16 %a1)
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ret i16 %t2
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}
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declare i16 @llvm.x86.avx512.knot.w(i16) nounwind readnone
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; CHECK-LABEL: test_knot
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; CHECK: knotw
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define i16 @test_knot(i16 %a0) {
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%res = call i16 @llvm.x86.avx512.knot.w(i16 %a0)
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ret i16 %res
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}
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declare i16 @llvm.x86.avx512.kunpck.bw(i16, i16) nounwind readnone
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; CHECK-LABEL: unpckbw_test
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; CHECK: kunpckbw
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; CHECK:ret
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define i16 @unpckbw_test(i16 %a0, i16 %a1) {
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%res = call i16 @llvm.x86.avx512.kunpck.bw(i16 %a0, i16 %a1)
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ret i16 %res
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}
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define <16 x float> @test_rcp_ps_512(<16 x float> %a0) {
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; CHECK: vrcp14ps
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%res = call <16 x float> @llvm.x86.avx512.rcp14.ps.512(<16 x float> %a0) ; <<16 x float>> [#uses=1]
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@ -33,19 +33,6 @@ define i16 @mand16(i16 %x, i16 %y) {
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ret i16 %ret
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}
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; CHECK: unpckbw_test
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; CHECK: kunpckbw
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; CHECK:ret
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declare <16 x i1> @llvm.x86.kunpck.v16i1(<8 x i1>, <8 x i1>) nounwind readnone
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define i16 @unpckbw_test(i8 %x, i8 %y) {
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%m0 = bitcast i8 %x to <8 x i1>
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%m1 = bitcast i8 %y to <8 x i1>
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%k = tail call <16 x i1> @llvm.x86.kunpck.v16i1(<8 x i1> %m0, <8 x i1> %m1)
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%r = bitcast <16 x i1> %k to i16
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ret i16 %r
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}
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; CHECK: shuf_test1
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; CHECK: kshiftrw $8
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; CHECK:ret
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