From 8ac0d4b4fb10406278cd600214cd3ee6d76620cd Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Sat, 22 Nov 2008 00:22:52 +0000 Subject: [PATCH] - Move conversion of [SU]ADDO from DAG combiner into legalizer. - Add "promote integer type" stuff to the legalizer for these nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59847 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 34 ------------------- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 21 ++++++++++++ .../SelectionDAG/LegalizeIntegerTypes.cpp | 33 +++++++++++++++--- lib/CodeGen/SelectionDAG/LegalizeTypes.h | 3 ++ 4 files changed, 53 insertions(+), 38 deletions(-) diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 13eede7424d..eb6481c996a 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -190,8 +190,6 @@ namespace { SDValue visitBUILD_VECTOR(SDNode *N); SDValue visitCONCAT_VECTORS(SDNode *N); SDValue visitVECTOR_SHUFFLE(SDNode *N); - SDValue visitSADDO(SDNode *N); - SDValue visitUADDO(SDNode *N); SDValue XformToShuffleWithZero(SDNode *N); SDValue ReassociateOps(unsigned Opc, SDValue LHS, SDValue RHS); @@ -729,8 +727,6 @@ SDValue DAGCombiner::visit(SDNode *N) { case ISD::BUILD_VECTOR: return visitBUILD_VECTOR(N); case ISD::CONCAT_VECTORS: return visitCONCAT_VECTORS(N); case ISD::VECTOR_SHUFFLE: return visitVECTOR_SHUFFLE(N); - case ISD::SADDO: return visitSADDO(N); - case ISD::UADDO: return visitUADDO(N); } return SDValue(); } @@ -5147,36 +5143,6 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) { return SDValue(); } -SDValue DAGCombiner::visitSADDO(SDNode *N) { - SDValue LHS = N->getOperand(0); - SDValue RHS = N->getOperand(1); - - SDValue Sum = DAG.getNode(ISD::ADD, LHS.getValueType(), LHS, RHS); - AddToWorkList(Sum.getNode()); - SDValue Cmp = DAG.getSetCC(MVT::i1, Sum, LHS, ISD::SETLT); - AddToWorkList(Cmp.getNode()); - - MVT ValueVTs[] = { LHS.getValueType(), MVT::i1 }; - SDValue Ops[] = { Sum, Cmp }; - - SDValue Merge = DAG.getMergeValues(DAG.getVTList(&ValueVTs[0], 2), - &Ops[0], 2); - SDNode *MNode = Merge.getNode(); - - AddToWorkList(MNode); - DAG.ReplaceAllUsesOfValueWith(SDValue(N, 0), SDValue(MNode, 0)); - DAG.ReplaceAllUsesOfValueWith(SDValue(N, 1), SDValue(MNode, 1)); - - // Since the node is now dead, remove it from the graph. - removeFromWorkList(N); - DAG.DeleteNode(N); - return SDValue(N, 0); -} - -SDValue DAGCombiner::visitUADDO(SDNode *N) { - return visitSADDO(N); -} - /// XformToShuffleWithZero - Returns a vector_shuffle if it able to transform /// an AND to a vector_shuffle with the destination vector and a zero vector. /// e.g. AND V, <0xffffffff, 0, 0xffffffff, 0>. ==> diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 5866e1a9f97..c1157106148 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -4167,6 +4167,27 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { } break; } + + case ISD::SADDO: { + SDValue LHS = LegalizeOp(Node->getOperand(0)); + SDValue RHS = LegalizeOp(Node->getOperand(1)); + + SDValue Sum = DAG.getNode(ISD::ADD, LHS.getValueType(), LHS, RHS); + MVT OType = SDValue(Node, 1).getValueType(); + SDValue Cmp = DAG.getSetCC(OType, Sum, LHS, ISD::SETLT); + + MVT ValueVTs[] = { LHS.getValueType(), OType }; + SDValue Ops[] = { Sum, Cmp }; + + Result = DAG.getMergeValues(DAG.getVTList(&ValueVTs[0], 2), &Ops[0], 2); + SDNode *RNode = Result.getNode(); + DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), SDValue(RNode, 0)); + DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), SDValue(RNode, 1)); + break; + } + case ISD::UADDO: { + break; + } } assert(Result.getValueType() == Op.getValueType() && diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index 650f02ca8ac..cd4524ef489 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -84,20 +84,23 @@ void DAGTypeLegalizer::PromoteIntegerResult(SDNode *N, unsigned ResNo) { case ISD::ANY_EXTEND: Result = PromoteIntRes_INT_EXTEND(N); break; case ISD::FP_TO_SINT: - case ISD::FP_TO_UINT: Result = PromoteIntRes_FP_TO_XINT(N); break; + case ISD::FP_TO_UINT: Result = PromoteIntRes_FP_TO_XINT(N); break; case ISD::AND: case ISD::OR: case ISD::XOR: case ISD::ADD: case ISD::SUB: - case ISD::MUL: Result = PromoteIntRes_SimpleIntBinOp(N); break; + case ISD::MUL: Result = PromoteIntRes_SimpleIntBinOp(N); break; case ISD::SDIV: - case ISD::SREM: Result = PromoteIntRes_SDIV(N); break; + case ISD::SREM: Result = PromoteIntRes_SDIV(N); break; case ISD::UDIV: - case ISD::UREM: Result = PromoteIntRes_UDIV(N); break; + case ISD::UREM: Result = PromoteIntRes_UDIV(N); break; + + case ISD::SADDO: Result = PromoteIntRes_SADDO(N, ResNo); break; + case ISD::UADDO: Result = PromoteIntRes_UADDO(N, ResNo); break; case ISD::ATOMIC_LOAD_ADD_8: case ISD::ATOMIC_LOAD_SUB_8: @@ -515,6 +518,28 @@ SDValue DAGTypeLegalizer::PromoteIntRes_UDIV(SDNode *N) { return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, RHS); } +SDValue DAGTypeLegalizer::PromoteIntRes_XADDO(SDNode *N, unsigned ResNo, + ISD::NodeType NTy) { + MVT NewVT = TLI.getTypeToTransformTo(SDValue(N, ResNo).getValueType()); + assert(isTypeLegal(NewVT) && "Illegal XADDO type!"); + + MVT ValueVTs[] = { N->getOperand(0).getValueType(), NewVT }; + SDValue Ops[] = { N->getOperand(0), N->getOperand(1) }; + + SDValue Res = DAG.getNode(NTy, DAG.getVTList(&ValueVTs[0], 2), &Ops[0], 2); + ReplaceValueWith(SDValue(N, 0), SDValue(Res.getNode(), 0)); + ReplaceValueWith(SDValue(N, 1), SDValue(Res.getNode(), 1)); + return Res; +} + +SDValue DAGTypeLegalizer::PromoteIntRes_SADDO(SDNode *N, unsigned ResNo) { + return PromoteIntRes_XADDO(N, ResNo, ISD::SADDO); +} + +SDValue DAGTypeLegalizer::PromoteIntRes_UADDO(SDNode *N, unsigned ResNo) { + return PromoteIntRes_XADDO(N, ResNo, ISD::UADDO); +} + SDValue DAGTypeLegalizer::PromoteIntRes_UNDEF(SDNode *N) { return DAG.getNode(ISD::UNDEF, TLI.getTypeToTransformTo(N->getValueType(0))); } diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/lib/CodeGen/SelectionDAG/LegalizeTypes.h index d217b7791bc..e9af5f53477 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeTypes.h +++ b/lib/CodeGen/SelectionDAG/LegalizeTypes.h @@ -268,6 +268,9 @@ private: SDValue PromoteIntRes_SRL(SDNode *N); SDValue PromoteIntRes_TRUNCATE(SDNode *N); SDValue PromoteIntRes_UDIV(SDNode *N); + SDValue PromoteIntRes_XADDO(SDNode *N, unsigned ResNo, ISD::NodeType NTy); + SDValue PromoteIntRes_SADDO(SDNode *N, unsigned ResNo); + SDValue PromoteIntRes_UADDO(SDNode *N, unsigned ResNo); SDValue PromoteIntRes_UNDEF(SDNode *N); SDValue PromoteIntRes_VAARG(SDNode *N);