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On the XCore the scavenging slot should be closest to the SP.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127680 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Richard Osborne 2011-03-15 15:10:11 +00:00
parent 6704415206
commit 8ae8cf4559
3 changed files with 59 additions and 0 deletions
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5
lib/Target/XCore/XCoreRegisterInfo.cpp
View File

@ -104,6 +104,11 @@ XCoreRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
return TFI->hasFP(MF);
}
bool
XCoreRegisterInfo::useFPForScavengingIndex(const MachineFunction &MF) const {
return false;
}
// This function eliminates ADJCALLSTACKDOWN,
// ADJCALLSTACKUP pseudo instructions
void XCoreRegisterInfo::

2
lib/Target/XCore/XCoreRegisterInfo.h
View File

@ -48,6 +48,8 @@ public:
bool requiresRegisterScavenging(const MachineFunction &MF) const;
bool useFPForScavengingIndex(const MachineFunction &MF) const;
void eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;

52
test/CodeGen/XCore/scavenging.ll Normal file
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@ -0,0 +1,52 @@
; RUN: llc < %s -march=xcore
@size = global i32 0 ; <i32*> [#uses=1]
@g0 = external global i32 ; <i32*> [#uses=2]
@g1 = external global i32 ; <i32*> [#uses=2]
@g2 = external global i32 ; <i32*> [#uses=2]
@g3 = external global i32 ; <i32*> [#uses=2]
@g4 = external global i32 ; <i32*> [#uses=2]
@g5 = external global i32 ; <i32*> [#uses=2]
@g6 = external global i32 ; <i32*> [#uses=2]
@g7 = external global i32 ; <i32*> [#uses=2]
@g8 = external global i32 ; <i32*> [#uses=2]
@g9 = external global i32 ; <i32*> [#uses=2]
@g10 = external global i32 ; <i32*> [#uses=2]
@g11 = external global i32 ; <i32*> [#uses=2]
define void @f() nounwind {
entry:
%x = alloca [100 x i32], align 4 ; <[100 x i32]*> [#uses=2]
%0 = load i32* @size, align 4 ; <i32> [#uses=1]
%1 = alloca i32, i32 %0, align 4 ; <i32*> [#uses=1]
%2 = volatile load i32* @g0, align 4 ; <i32> [#uses=1]
%3 = volatile load i32* @g1, align 4 ; <i32> [#uses=1]
%4 = volatile load i32* @g2, align 4 ; <i32> [#uses=1]
%5 = volatile load i32* @g3, align 4 ; <i32> [#uses=1]
%6 = volatile load i32* @g4, align 4 ; <i32> [#uses=1]
%7 = volatile load i32* @g5, align 4 ; <i32> [#uses=1]
%8 = volatile load i32* @g6, align 4 ; <i32> [#uses=1]
%9 = volatile load i32* @g7, align 4 ; <i32> [#uses=1]
%10 = volatile load i32* @g8, align 4 ; <i32> [#uses=1]
%11 = volatile load i32* @g9, align 4 ; <i32> [#uses=1]
%12 = volatile load i32* @g10, align 4 ; <i32> [#uses=1]
%13 = volatile load i32* @g11, align 4 ; <i32> [#uses=2]
%14 = getelementptr [100 x i32]* %x, i32 0, i32 50 ; <i32*> [#uses=1]
store i32 %13, i32* %14, align 4
volatile store i32 %13, i32* @g11, align 4
volatile store i32 %12, i32* @g10, align 4
volatile store i32 %11, i32* @g9, align 4
volatile store i32 %10, i32* @g8, align 4
volatile store i32 %9, i32* @g7, align 4
volatile store i32 %8, i32* @g6, align 4
volatile store i32 %7, i32* @g5, align 4
volatile store i32 %6, i32* @g4, align 4
volatile store i32 %5, i32* @g3, align 4
volatile store i32 %4, i32* @g2, align 4
volatile store i32 %3, i32* @g1, align 4
volatile store i32 %2, i32* @g0, align 4
%x1 = getelementptr [100 x i32]* %x, i32 0, i32 0 ; <i32*> [#uses=1]
call void @g(i32* %x1, i32* %1) nounwind
ret void
}
declare void @g(i32*, i32*)