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ARM: do not relax Thumb1 -> Thumb2 if only Thumb1 is available.

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After recognising that a certain narrow instruction might need a relocation to
be represented, we used to unconditionally relax it to a Thumb2 instruction to
permit this. Unfortunately, some CPUs (e.g. v6m) don't even have most Thumb2
instructions, so we end up emitting a completely invalid instruction.

Theoretically, ELF does have relocations for these situations; but they are
fairly unusable with such short ranges and the ABI document even says they're
documented "for completeness". So an error is probably better there too.

rdar://20391953

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234195 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2015-04-06 18:44:42 +00:00
parent 2ec7242600
commit 8af3f965e0
8 changed files with 65 additions and 13 deletions
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12
lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
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@ -153,18 +153,20 @@ void ARMAsmBackend::handleAssemblerFlag(MCAssemblerFlag Flag) {
}
} // end anonymous namespace
static unsigned getRelaxedOpcode(unsigned Op) {
unsigned ARMAsmBackend::getRelaxedOpcode(unsigned Op) const {
bool HasThumb2 = STI->getFeatureBits() & ARM::FeatureThumb2;
switch (Op) {
default:
return Op;
case ARM::tBcc:
return ARM::t2Bcc;
return HasThumb2 ? ARM::t2Bcc : Op;
case ARM::tLDRpci:
return ARM::t2LDRpci;
return HasThumb2 ? ARM::t2LDRpci : Op;
case ARM::tADR:
return ARM::t2ADR;
return HasThumb2 ? ARM::t2ADR : Op;
case ARM::tB:
return ARM::t2B;
return HasThumb2 ? ARM::t2B : Op;
case ARM::tCBZ:
return ARM::tHINT;
case ARM::tCBNZ:

2
lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
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@ -47,6 +47,8 @@ public:
void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
uint64_t Value, bool IsPCRel) const override;
unsigned getRelaxedOpcode(unsigned Op) const;
bool mayNeedRelaxation(const MCInst &Inst) const override;
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,

8
lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
View File

@ -81,7 +81,9 @@ unsigned ARMELFObjectWriter::GetRelocTypeInner(const MCValue &Target,
unsigned Type = 0;
if (IsPCRel) {
switch ((unsigned)Fixup.getKind()) {
default: llvm_unreachable("Unimplemented");
default:
report_fatal_error("unsupported relocation on symbol");
return ELF::R_ARM_NONE;
case FK_Data_4:
switch (Modifier) {
default: llvm_unreachable("Unsupported Modifier");
@ -147,7 +149,9 @@ unsigned ARMELFObjectWriter::GetRelocTypeInner(const MCValue &Target,
}
} else {
switch ((unsigned)Fixup.getKind()) {
default: llvm_unreachable("invalid fixup kind!");
default:
report_fatal_error("unsupported relocation on symbol");
return ELF::R_ARM_NONE;
case FK_Data_1:
switch (Modifier) {
default: llvm_unreachable("unsupported Modifier");

7
lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
View File

@ -88,6 +88,7 @@ static bool getARMFixupKindMachOInfo(unsigned Kind, unsigned &RelocType,
case ARM::fixup_arm_ldst_pcrel_12:
case ARM::fixup_arm_pcrel_10:
case ARM::fixup_arm_adr_pcrel_12:
case ARM::fixup_arm_thumb_br:
return false;
// Handle 24-bit branch kinds.
@ -101,12 +102,6 @@ static bool getARMFixupKindMachOInfo(unsigned Kind, unsigned &RelocType,
Log2Size = llvm::Log2_32(4);
return true;
// Handle Thumb branches.
case ARM::fixup_arm_thumb_br:
RelocType = unsigned(MachO::ARM_THUMB_RELOC_BR22);
Log2Size = llvm::Log2_32(2);
return true;
case ARM::fixup_t2_uncondbranch:
case ARM::fixup_arm_thumb_bl:
case ARM::fixup_arm_thumb_blx:

9
test/MC/ARM/thumb1-relax-adr.s Normal file
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@ -0,0 +1,9 @@
@ RUN: not llvm-mc -triple thumbv6m-none-macho -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
@ RUN: not llvm-mc -triple thumbv7m-none-macho -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
@ RUN: not llvm-mc -triple thumbv7m-none-eabi -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
.global func1
_func1:
adr r0, _func2
@ CHECK-ERROR: unsupported relocation on symbol

12
test/MC/ARM/thumb1-relax-bcc.s Normal file
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@ -0,0 +1,12 @@
@ RUN: not llvm-mc -triple thumbv6m-none-macho -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
@ RUN: not llvm-mc -triple thumbv7m-none-macho -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
@ RUN: llvm-mc -triple thumbv7m-none-eabi -filetype=obj -o %t %s
@ RUN: llvm-objdump -d -r -triple thumbv7m-none-eabi %t | FileCheck --check-prefix=CHECK-ELF %s
.global func1
_func1:
bne _func2
@ CHECK-ERROR: unsupported relocation on symbol
@ CHECK-ELF: 7f f4 fe af bne.w #-4
@ CHECK-ELF-NEXT: R_ARM_THM_JUMP24 _func2

19
test/MC/ARM/thumb1-relax-br.s Normal file
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@ -0,0 +1,19 @@
@ RUN: not llvm-mc -triple thumbv6m-none-macho -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
@ RUN: llvm-mc -triple thumbv7m-none-macho -filetype=obj -o %t %s
@ RUN: llvm-objdump -d -r -triple thumbv7m-none-macho %t | FileCheck --check-prefix=CHECK-MACHO %s
@ RUN: llvm-mc -triple thumbv7m-none-eabi -filetype=obj -o %t %s
@ RUN: llvm-objdump -d -r -triple thumbv7m-none-eabi %t | FileCheck --check-prefix=CHECK-ELF %s
.global func1
_func1:
@ There is no MachO relocation for Thumb1's unconditional branch, so
@ this is unrepresentable. FIXME: I think ELF could represent this.
b _func2
@ CHECK-ERROR: unsupported relocation on symbol
@ CHECK-MACHO: ff f7 fe bf b.w #-4
@ CHECK-MACHO-NEXT: ARM_THUMB_RELOC_BR22
@ CHECK-ELF: ff f7 fe bf b.w #-4
@ CHECK-ELF-NEXT: R_ARM_THM_JUMP24 _func2

9
test/MC/ARM/thumb1-relax-ldrlit.s Normal file
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@ -0,0 +1,9 @@
@ RUN: not llvm-mc -triple thumbv6m-none-macho -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
@ RUN: not llvm-mc -triple thumbv7m-none-macho -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
@ RUN: not llvm-mc -triple thumbv7m-none-eabi -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
.global func1
_func1:
ldr r0, _func2
@ CHECK-ERROR: unsupported relocation on symbol