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https://github.com/c64scene-ar/llvm-6502.git
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Add more ADC and SBB variants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12607 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -123,8 +123,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
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return false;
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#endif
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case X86::ADD16ri: case X86::ADD32ri:
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case X86::SUB16ri: case X86::SUB32ri:
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case X86::ADD16ri: case X86::ADD32ri: case X86::ADC32ri:
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case X86::SUB16ri: case X86::SUB32ri: case X86::SBB32ri:
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case X86::AND16ri: case X86::AND32ri:
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case X86::OR16ri: case X86::OR32ri:
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case X86::XOR16ri: case X86::XOR32ri:
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@@ -138,8 +138,10 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
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default: assert(0 && "Unknown opcode value!");
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case X86::ADD16ri: Opcode = X86::ADD16ri8; break;
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case X86::ADD32ri: Opcode = X86::ADD32ri8; break;
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case X86::ADC32ri: Opcode = X86::ADC32ri8; break;
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case X86::SUB16ri: Opcode = X86::SUB16ri8; break;
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case X86::SUB32ri: Opcode = X86::SUB32ri8; break;
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case X86::SBB32ri: Opcode = X86::SBB32ri8; break;
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case X86::AND16ri: Opcode = X86::AND16ri8; break;
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case X86::AND32ri: Opcode = X86::AND32ri8; break;
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case X86::OR16ri: Opcode = X86::OR16ri8; break;
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@@ -156,8 +158,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
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}
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return false;
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case X86::ADD16mi: case X86::ADD32mi:
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case X86::SUB16mi: case X86::SUB32mi:
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case X86::ADD16mi: case X86::ADD32mi: case X86::ADC32mi:
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case X86::SUB16mi: case X86::SUB32mi: case X86::SBB32mi:
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case X86::AND16mi: case X86::AND32mi:
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case X86::OR16mi: case X86::OR32mi:
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case X86::XOR16mi: case X86::XOR32mi:
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@@ -171,8 +173,10 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
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default: assert(0 && "Unknown opcode value!");
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case X86::ADD16mi: Opcode = X86::ADD16mi8; break;
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case X86::ADD32mi: Opcode = X86::ADD32mi8; break;
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case X86::ADC32mi: Opcode = X86::ADC32mi8; break;
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case X86::SUB16mi: Opcode = X86::SUB16mi8; break;
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case X86::SUB32mi: Opcode = X86::SUB32mi8; break;
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case X86::SBB32mi: Opcode = X86::SBB32mi8; break;
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case X86::AND16mi: Opcode = X86::AND16mi8; break;
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case X86::AND32mi: Opcode = X86::AND32mi8; break;
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case X86::OR16mi: Opcode = X86::OR16mi8; break;
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