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ARM: Better disassembly for pc-relative LDR.

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When the operand is a plain immediate rather than a label, print it
as [pc, #imm] like we do for the Thumb2 wide encoding variant.

rdar://12154503

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166991 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2012-10-30 01:04:51 +00:00
parent c09856b535
commit 8ba1474181
9 changed files with 15 additions and 11 deletions
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1
lib/Target/ARM/ARMInstrThumb.td
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@ -223,6 +223,7 @@ def t_addrmode_sp : Operand<i32>,
def t_addrmode_pc : Operand<i32> {
let EncoderMethod = "getAddrModePCOpValue";
let DecoderMethod = "DecodeThumbAddrModePC";
let PrintMethod = "printThumbLdrLabelOperand";
}
//===----------------------------------------------------------------------===//

2
lib/Target/ARM/ARMInstrThumb2.td
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@ -159,7 +159,7 @@ def t2addrmode_imm12 : Operand<i32>,
// t2ldrlabel := imm12
def t2ldrlabel : Operand<i32> {
let EncoderMethod = "getAddrModeImm12OpValue";
let PrintMethod = "printT2LdrLabelOperand";
let PrintMethod = "printThumbLdrLabelOperand";
}
def t2ldr_pcrel_imm12_asmoperand : AsmOperandClass {let Name = "MemPCRelImm12";}

4
lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
View File

@ -283,8 +283,8 @@ void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
}
}
void ARMInstPrinter::printT2LdrLabelOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
const MCOperand &MO1 = MI->getOperand(OpNum);
if (MO1.isExpr())
O << *MO1.getExpr();

3
lib/Target/ARM/InstPrinter/ARMInstPrinter.h
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@ -126,7 +126,8 @@ public:
void printRotImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printPCLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printT2LdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O);
void printFBits16(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printFBits32(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printVectorIndex(const MCInst *MI, unsigned OpNum, raw_ostream &O);

4
test/MC/ARM/basic-thumb-instructions.s
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@ -259,8 +259,8 @@ _func:
@ CHECK: ldr r1, _foo @ encoding: [A,0x49]
@ fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp
@ CHECK: ldr r3, #604 @ encoding: [0x97,0x4b]
@ CHECK: ldr r3, #368 @ encoding: [0x5c,0x4b]
@ CHECK: ldr r3, [pc, #604] @ encoding: [0x97,0x4b]
@ CHECK: ldr r3, [pc, #368] @ encoding: [0x5c,0x4b]
@------------------------------------------------------------------------------
@ LDR (register)

2
test/MC/Disassembler/ARM/marked-up-thumb.txt
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@ -1,5 +1,5 @@
# RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -mdis < %s | FileCheck %s
# CHECK: ldr <reg:r4>, <imm:#32>
# CHECK: ldr <reg:r4>, <mem:[pc, <imm:#32>]>
0x08 0x4c
# CHECK: push {<reg:r1>, <reg:r2>, <reg:r7>}
0x86 0xb4

6
test/MC/Disassembler/ARM/thumb-printf.txt
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@ -7,17 +7,17 @@
# CHECK-NEXT: add r3, sp, #20
# CHECK-NEXT: ldr r5, [r3], #4
# CHECK-NEXT: str r3, [sp]
# CHECK-NEXT: ldr r3, #52
# CHECK-NEXT: ldr r3, [pc, #52]
# CHECK-NEXT: add r3, pc
# CHECK-NEXT: ldr r0, [r3]
# CHECK-NEXT: ldr r4, [r0]
# CHECK-NEXT: ldr r0, #48
# CHECK-NEXT: ldr r0, [pc, #48]
# CHECK-NEXT: add r0, pc
# CHECK-NEXT: ldr r0, [r0]
# CHECK-NEXT: ldr r0, [r0]
# CHECK-NEXT: blx #191548
# CHECK-NEXT: cbnz r0, #6
# CHECK-NEXT: ldr r1, #40
# CHECK-NEXT: ldr r1, [pc, #40]
# CHECK-NEXT: add r1, pc
# CHECK-NEXT: ldr r1, [r1]
# CHECK-NEXT: b #0

2
test/MC/Disassembler/ARM/thumb-tests.txt
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@ -30,7 +30,7 @@
# CHECK: ldm r0!, {r1}
0x02 0xc8
# CHECK: ldr r5, #432
# CHECK: ldr r5, [pc, #432]
0x6c 0x4d
# CHECK: str r0, [r3]

2
test/MC/Disassembler/ARM/thumb1.txt
View File

@ -160,6 +160,7 @@
# CHECK: ldr r1, [sp]
# CHECK: ldr r2, [sp, #24]
# CHECK: ldr r3, [sp, #1020]
# CHECK: ldr r1, [pc, #12]
0x29 0x68
@ -168,6 +169,7 @@
0x00 0x99
0x06 0x9a
0xff 0x9b
0x03 0x49
#------------------------------------------------------------------------------
# LDR (register)