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[mips] [IAS] Do not generate redundant ORi in createLShiftOri.

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Summary: If the immediate is 0, the ORi is pointless.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235990 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Toma Tabacu
2015-04-28 14:06:35 +00:00
parent 1f7a90d793
commit 8bec0f9db1
3 changed files with 20 additions and 13 deletions
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4
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
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@@ -1645,6 +1645,10 @@ void createLShiftOri(MCOperand Operand, unsigned RegNo, SMLoc IDLoc,
Instructions.push_back(tmpInst);
tmpInst.clear();
}
// There's no need for an ORi if the immediate is 0.
if (Operand.isImm() && Operand.getImm() == 0)
return;
tmpInst.setOpcode(Mips::ORi);
tmpInst.addOperand(MCOperand::CreateReg(RegNo));
tmpInst.addOperand(MCOperand::CreateReg(RegNo));