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Two changes:

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1. Switch expression and cases are compared signed and are sign extended.
2. For function results needing extended, do SIGN_EXTEND if the SExtAttribute
   is set and ZERO_EXTEND if the ZExtAttribute is set, otherwise just let
   the Legalizer do ANY_EXTEND.
This fixes the recent regression in kimwitu++ and probably the llvm-gcc
bootstrap issue we had today.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32830 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reid Spencer 2007-01-03 04:25:33 +00:00
parent b47b25cfda
commit 8c57dfb1ae
1 changed files with 12 additions and 5 deletions
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17
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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@ -397,8 +397,8 @@ class SelectionDAGLowering {
struct CaseCmp {
bool operator () (const Case& C1, const Case& C2) {
assert(isa<ConstantInt>(C1.first) && isa<ConstantInt>(C2.first));
return cast<const ConstantInt>(C1.first)->getZExtValue() <
cast<const ConstantInt>(C2.first)->getZExtValue();
return cast<const ConstantInt>(C1.first)->getSExtValue() <
cast<const ConstantInt>(C2.first)->getSExtValue();
}
};
@ -766,10 +766,17 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) {
else
TmpVT = MVT::i32;
const FunctionType *FTy = I.getParent()->getParent()->getFunctionType();
ISD::NodeType ExtendKind = ISD::SIGN_EXTEND;
ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
if (FTy->paramHasAttr(0, FunctionType::SExtAttribute))
ExtendKind = ISD::SIGN_EXTEND;
if (FTy->paramHasAttr(0, FunctionType::ZExtAttribute))
ExtendKind = ISD::ZERO_EXTEND;
RetOp = DAG.getNode(ExtendKind, TmpVT, RetOp);
if (ExtendKind == ISD::ANY_EXTEND)
// There was no specification for extension in the parameter attributes
// so we will just let the legalizer do the ANY_EXTEND
;
else
RetOp = DAG.getNode(ExtendKind, TmpVT, RetOp);
}
NewValues.push_back(RetOp);
NewValues.push_back(DAG.getConstant(false, MVT::i32));
@ -1378,7 +1385,7 @@ void SelectionDAGLowering::visitSwitch(SwitchInst &I) {
// Create a CaseBlock record representing a conditional branch to
// the LHS node if the value being switched on SV is less than C.
// Otherwise, branch to LHS.
ISD::CondCode CC = ISD::SETULT;
ISD::CondCode CC = ISD::SETLT;
SelectionDAGISel::CaseBlock CB(CC, SV, C, TrueBB, FalseBB, CR.CaseBB);
if (CR.CaseBB == CurMBB)