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* Changes to be a MachineFunctionPass

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* Frame information is now stuck in MachineFunctionInfo instead of directly
  in MachineFunction.
* Don't require a TM as an argument to the ctor


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5172 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2002-12-28 20:16:08 +00:00
parent d0fe5f5769
commit 8cab46e10e
1 changed files with 46 additions and 56 deletions
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102
lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
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@@ -11,7 +11,8 @@
#include "SparcInternals.h" #include "SparcInternals.h"
#include "SparcRegClassInfo.h" #include "SparcRegClassInfo.h"
#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineFunctionInfo.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/InstrSelectionSupport.h" #include "llvm/CodeGen/InstrSelectionSupport.h"
@@ -19,48 +20,38 @@
#include "llvm/Function.h" #include "llvm/Function.h"
namespace { namespace {
class InsertPrologEpilogCode : public FunctionPass { struct InsertPrologEpilogCode : public MachineFunctionPass {
TargetMachine &Target;
public:
InsertPrologEpilogCode(TargetMachine &T) : Target(T) {}
const char *getPassName() const { return "Sparc Prolog/Epilog Inserter"; } const char *getPassName() const { return "Sparc Prolog/Epilog Inserter"; }
bool runOnFunction(Function &F) { bool runOnMachineFunction(MachineFunction &F) {
MachineFunction &mcodeInfo = MachineFunction::get(&F); if (!F.getInfo()->isCompiledAsLeafMethod()) {
if (!mcodeInfo.isCompiledAsLeafMethod()) {
InsertPrologCode(F); InsertPrologCode(F);
InsertEpilogCode(F); InsertEpilogCode(F);
} }
return false; return false;
} }
void InsertPrologCode(Function &F); void InsertPrologCode(MachineFunction &F);
void InsertEpilogCode(Function &F); void InsertEpilogCode(MachineFunction &F);
}; };
} // End anonymous namespace } // End anonymous namespace
//------------------------------------------------------------------------ //------------------------------------------------------------------------
// External Function: GetInstructionsForProlog
// External Function: GetInstructionsForEpilog
//
// Purpose:
// Create prolog and epilog code for procedure entry and exit // Create prolog and epilog code for procedure entry and exit
//------------------------------------------------------------------------ //------------------------------------------------------------------------
void InsertPrologEpilogCode::InsertPrologCode(Function &F) void InsertPrologEpilogCode::InsertPrologCode(MachineFunction &MF)
{ {
std::vector<MachineInstr*> mvec; std::vector<MachineInstr*> mvec;
MachineInstr* M; const TargetMachine &TM = MF.getTarget();
const MachineFrameInfo& frameInfo = Target.getFrameInfo(); const TargetFrameInfo& frameInfo = TM.getFrameInfo();
// The second operand is the stack size. If it does not fit in the // The second operand is the stack size. If it does not fit in the
// immediate field, we have to use a free register to hold the size. // immediate field, we have to use a free register to hold the size.
// See the comments below for the choice of this register. // See the comments below for the choice of this register.
// //
MachineFunction& mcInfo = MachineFunction::get(&F); unsigned staticStackSize = MF.getInfo()->getStaticStackSize();
unsigned staticStackSize = mcInfo.getStaticStackSize();
if (staticStackSize < (unsigned) frameInfo.getMinStackFrameSize()) if (staticStackSize < (unsigned) frameInfo.getMinStackFrameSize())
staticStackSize = (unsigned) frameInfo.getMinStackFrameSize(); staticStackSize = (unsigned) frameInfo.getMinStackFrameSize();
@@ -70,50 +61,50 @@ void InsertPrologEpilogCode::InsertPrologCode(Function &F)
staticStackSize += frameInfo.getStackFrameSizeAlignment() - padsz; staticStackSize += frameInfo.getStackFrameSizeAlignment() - padsz;
int32_t C = - (int) staticStackSize; int32_t C = - (int) staticStackSize;
int SP = Target.getRegInfo().getStackPointer(); int SP = TM.getRegInfo().getStackPointer();
if (Target.getInstrInfo().constantFitsInImmedField(SAVE, staticStackSize)) { if (TM.getInstrInfo().constantFitsInImmedField(SAVE, staticStackSize)) {
M = BuildMI(SAVE, 3).addMReg(SP).addSImm(C).addMReg(SP); mvec.push_back(BuildMI(SAVE, 3).addMReg(SP).addSImm(C).addMReg(SP));
mvec.push_back(M);
} else { } else {
// We have to put the stack size value into a register before SAVE. // We have to put the stack size value into a register before SAVE.
// Use register %g1 since it is volatile across calls. Note that the // Use register %g1 since it is volatile across calls. Note that the
// local (%l) and in (%i) registers cannot be used before the SAVE! // local (%l) and in (%i) registers cannot be used before the SAVE!
// Do this by creating a code sequence equivalent to: // Do this by creating a code sequence equivalent to:
// SETSW -(stackSize), %g1 // SETSW -(stackSize), %g1
int uregNum = Target.getRegInfo().getUnifiedRegNum( int uregNum = TM.getRegInfo().getUnifiedRegNum(
Target.getRegInfo().getRegClassIDOfType(Type::IntTy), TM.getRegInfo().getRegClassIDOfType(Type::IntTy),
SparcIntRegClass::g1); SparcIntRegClass::g1);
M = BuildMI(SETHI, 2).addSImm(C).addMReg(uregNum);
M->setOperandHi32(0);
mvec.push_back(M);
M = BuildMI(OR, 3).addMReg(uregNum).addSImm(C).addMReg(uregNum);
M->setOperandLo32(1);
mvec.push_back(M);
M = BuildMI(SRA, 3).addMReg(uregNum).addZImm(0).addMReg(uregNum);
mvec.push_back(M);
// Now generate the SAVE using the value in register %g1
M = BuildMI(SAVE, 3).addMReg(SP).addMReg(uregNum).addMReg(SP);
mvec.push_back(M);
}
MachineBasicBlock& bbMvec = mcInfo.front(); MachineInstr* M = BuildMI(SETHI, 2).addSImm(C).addMReg(uregNum);
bbMvec.insert(bbMvec.begin(), mvec.begin(), mvec.end()); M->setOperandHi32(0);
mvec.push_back(M);
M = BuildMI(OR, 3).addMReg(uregNum).addSImm(C).addMReg(uregNum);
M->setOperandLo32(1);
mvec.push_back(M);
M = BuildMI(SRA, 3).addMReg(uregNum).addZImm(0).addMReg(uregNum);
mvec.push_back(M);
// Now generate the SAVE using the value in register %g1
M = BuildMI(SAVE, 3).addMReg(SP).addMReg(uregNum).addMReg(SP);
mvec.push_back(M);
}
MF.front().insert(MF.front().begin(), mvec.begin(), mvec.end());
} }
void InsertPrologEpilogCode::InsertEpilogCode(Function &F) void InsertPrologEpilogCode::InsertEpilogCode(MachineFunction &MF)
{ {
MachineFunction &MF = MachineFunction::get(&F); const TargetMachine &TM = MF.getTarget();
const MachineInstrInfo &MII = TM.getInstrInfo();
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
MachineBasicBlock &MBB = *I; MachineBasicBlock &MBB = *I;
BasicBlock &BB = *I->getBasicBlock(); BasicBlock &BB = *I->getBasicBlock();
Instruction *TermInst = (Instruction*)BB.getTerminator(); Instruction *TermInst = (Instruction*)BB.getTerminator();
if (TermInst->getOpcode() == Instruction::Ret) if (TermInst->getOpcode() == Instruction::Ret)
{ {
int ZR = Target.getRegInfo().getZeroRegNum(); int ZR = TM.getRegInfo().getZeroRegNum();
MachineInstr *Restore = MachineInstr *Restore =
BuildMI(RESTORE, 3).addMReg(ZR).addSImm(0).addMReg(ZR); BuildMI(RESTORE, 3).addMReg(ZR).addSImm(0).addMReg(ZR);
@@ -121,7 +112,6 @@ void InsertPrologEpilogCode::InsertEpilogCode(Function &F)
MachineCodeForInstruction::get(TermInst); MachineCodeForInstruction::get(TermInst);
// Remove the NOPs in the delay slots of the return instruction // Remove the NOPs in the delay slots of the return instruction
const MachineInstrInfo &mii = Target.getInstrInfo();
unsigned numNOPs = 0; unsigned numNOPs = 0;
while (termMvec.back()->getOpCode() == NOP) while (termMvec.back()->getOpCode() == NOP)
{ {
@@ -134,7 +124,7 @@ void InsertPrologEpilogCode::InsertEpilogCode(Function &F)
// Check that we found the right number of NOPs and have the right // Check that we found the right number of NOPs and have the right
// number of instructions to replace them. // number of instructions to replace them.
unsigned ndelays = mii.getNumDelaySlots(termMvec.back()->getOpCode()); unsigned ndelays = MII.getNumDelaySlots(termMvec.back()->getOpCode());
assert(numNOPs == ndelays && "Missing NOPs in delay slots?"); assert(numNOPs == ndelays && "Missing NOPs in delay slots?");
assert(ndelays == 1 && "Cannot use epilog code for delay slots?"); assert(ndelays == 1 && "Cannot use epilog code for delay slots?");
@@ -145,5 +135,5 @@ void InsertPrologEpilogCode::InsertEpilogCode(Function &F)
} }
Pass* UltraSparc::getPrologEpilogInsertionPass() { Pass* UltraSparc::getPrologEpilogInsertionPass() {
return new InsertPrologEpilogCode(*this); return new InsertPrologEpilogCode();
} }