mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2026-04-27 04:18:42 +00:00
[ARM] Lower modulo operation to generate __aeabi_divmod on Android
For a modulo (reminder) operation, clang -target armv7-none-linux-gnueabi generates "__modsi3" clang -target armv7-none-eabi generates "__aeabi_idivmod" clang -target armv7-linux-androideabi generates "__modsi3" Android bionic libc doesn't provide a __modsi3, instead it provides a "__aeabi_idivmod". This patch fixes the LLVM ARMISelLowering to generate the correct call when ever there is a modulo operation. Differential Revision: http://reviews.llvm.org/D11661 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243717 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
1 parent
2623dd4454
commit
8d13756ddd
2 files changed
+6
-3
No files matched your search
@@ -735,11 +735,11 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
|
|||||||
setOperationAction(ISD::UDIV, MVT::i32, Expand);
|
setOperationAction(ISD::UDIV, MVT::i32, Expand);
|
||||||
}
|
}
|
||||||
|
|
||||||
// FIXME: Also set divmod for SREM on EABI
|
// FIXME: Also set divmod for SREM on EABI/androideabi
|
||||||
setOperationAction(ISD::SREM, MVT::i32, Expand);
|
setOperationAction(ISD::SREM, MVT::i32, Expand);
|
||||||
setOperationAction(ISD::UREM, MVT::i32, Expand);
|
setOperationAction(ISD::UREM, MVT::i32, Expand);
|
||||||
// Register based DivRem for AEABI (RTABI 4.2)
|
// Register based DivRem for AEABI (RTABI 4.2)
|
||||||
if (Subtarget->isTargetAEABI()) {
|
if (Subtarget->isTargetAEABI() || Subtarget->isTargetAndroid()) {
|
||||||
setLibcallName(RTLIB::SDIVREM_I8, "__aeabi_idivmod");
|
setLibcallName(RTLIB::SDIVREM_I8, "__aeabi_idivmod");
|
||||||
setLibcallName(RTLIB::SDIVREM_I16, "__aeabi_idivmod");
|
setLibcallName(RTLIB::SDIVREM_I16, "__aeabi_idivmod");
|
||||||
setLibcallName(RTLIB::SDIVREM_I32, "__aeabi_idivmod");
|
setLibcallName(RTLIB::SDIVREM_I32, "__aeabi_idivmod");
|
||||||
@@ -11159,7 +11159,8 @@ void ARMTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
|
|||||||
}
|
}
|
||||||
|
|
||||||
SDValue ARMTargetLowering::LowerDivRem(SDValue Op, SelectionDAG &DAG) const {
|
SDValue ARMTargetLowering::LowerDivRem(SDValue Op, SelectionDAG &DAG) const {
|
||||||
assert(Subtarget->isTargetAEABI() && "Register-based DivRem lowering only");
|
assert((Subtarget->isTargetAEABI() || Subtarget->isTargetAndroid()) &&
|
||||||
|
"Register-based DivRem lowering only");
|
||||||
unsigned Opcode = Op->getOpcode();
|
unsigned Opcode = Op->getOpcode();
|
||||||
assert((Opcode == ISD::SDIVREM || Opcode == ISD::UDIVREM) &&
|
assert((Opcode == ISD::SDIVREM || Opcode == ISD::UDIVREM) &&
|
||||||
"Invalid opcode for Div/Rem lowering");
|
"Invalid opcode for Div/Rem lowering");
|
||||||
|
|||||||
@@ -1,5 +1,7 @@
|
|||||||
; RUN: llc -mtriple armv7-none-eabi %s -o - | FileCheck %s --check-prefix=EABI
|
; RUN: llc -mtriple armv7-none-eabi %s -o - | FileCheck %s --check-prefix=EABI
|
||||||
; RUN: llc -mtriple armv7-none-eabihf %s -o - | FileCheck %s --check-prefix=EABI
|
; RUN: llc -mtriple armv7-none-eabihf %s -o - | FileCheck %s --check-prefix=EABI
|
||||||
|
; Both "none-eabi" and "androideabi" must lower SREM/UREM to __aeabi_{u,i}divmod
|
||||||
|
; RUN: llc -mtriple armv7-linux-androideabi %s -o - | FileCheck %s --check-prefix=EABI
|
||||||
; RUN: llc -mtriple armv7-linux-gnueabi %s -o - | FileCheck %s --check-prefix=GNU
|
; RUN: llc -mtriple armv7-linux-gnueabi %s -o - | FileCheck %s --check-prefix=GNU
|
||||||
; RUN: llc -mtriple armv7-apple-darwin %s -o - | FileCheck %s --check-prefix=DARWIN
|
; RUN: llc -mtriple armv7-apple-darwin %s -o - | FileCheck %s --check-prefix=DARWIN
|
||||||
; FIXME: long-term, we will use "-apple-macho" and won't need this exception:
|
; FIXME: long-term, we will use "-apple-macho" and won't need this exception:
|
||||||
|
|||||||
Reference in new issue
Block a user