6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-05 01:31:05 +00:00
Code Issues Projects Releases Wiki Activity

Fix demanded bits analysis with srem by negative number. Based on a patch

Browse Source 
by Richard Osborne.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58555 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nick Lewycky 2008-11-02 02:41:50 +00:00
parent 21440acc06
commit 8e39432ea9
2 changed files with 11 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
lib/Transforms/Scalar/InstructionCombining.cpp
View File

@ -1274,12 +1274,12 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
break;
case Instruction::SRem:
if (ConstantInt *Rem = dyn_cast<ConstantInt>(I->getOperand(1))) {
APInt RA = Rem->getValue();
if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
APInt RA = Rem->getValue().abs();
if (RA.isPowerOf2()) {
if (DemandedMask.ule(RA)) // srem won't affect demanded bits
return UpdateValueUsesWith(I, I->getOperand(0));
APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
APInt LowBits = RA - 1;
APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
if (SimplifyDemandedBits(I->getOperand(0), Mask2,
LHSKnownZero, LHSKnownOne, Depth+1))

8
test/Transforms/InstCombine/2008-11-01-SRemDemandedBits.ll Normal file
View File

@ -0,0 +1,8 @@
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {ret i1 true}
; PR2993
define i1 @foo(i32 %x) {
%1 = srem i32 %x, -1
%2 = icmp eq i32 %1, 0
ret i1 %2
}