From 8e63dcebcc3256a9bf656c21f163b478b82e00a6 Mon Sep 17 00:00:00 2001 From: Misha Brukman Date: Thu, 12 Aug 2004 02:51:38 +0000 Subject: [PATCH] Eliminate special-casing 14-bit immediate load/store opcodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15677 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPC64AsmPrinter.cpp | 21 +++++---------------- 1 file changed, 5 insertions(+), 16 deletions(-) diff --git a/lib/Target/PowerPC/PPC64AsmPrinter.cpp b/lib/Target/PowerPC/PPC64AsmPrinter.cpp index 11904c14713..02f316c72b8 100644 --- a/lib/Target/PowerPC/PPC64AsmPrinter.cpp +++ b/lib/Target/PowerPC/PPC64AsmPrinter.cpp @@ -570,8 +570,11 @@ void Printer::printMachineInstruction(const MachineInstr *MI) { } O << TII.getName(Opcode) << " "; - if (Opcode == PPC::LD || Opcode == PPC::LWA || - Opcode == PPC::STDU || Opcode == PPC::STDUX) { + if (Opcode == PPC::BLR || Opcode == PPC::NOP) { + // FIXME: BuildMI() should handle 0 params + O << "\n"; + } else if (ArgCount == 3 && + (ArgType[1] == PPCII::Disimm16 || ArgType[1] == PPCII::Disimm14)) { printOp(MI->getOperand(0)); O << ", "; MachineOperand MO = MI->getOperand(1); @@ -582,20 +585,6 @@ void Printer::printMachineInstruction(const MachineInstr *MI) { O << "("; printOp(MI->getOperand(2)); O << ")\n"; - } else if (Opcode == PPC::BLR || Opcode == PPC::NOP) { - // FIXME: BuildMI() should handle 0 params - O << "\n"; - } else if (ArgCount == 3 && ArgType[1] == PPCII::Disimm16) { - printOp(MI->getOperand(0)); - O << ", "; - printImmOp(MI->getOperand(1), ArgType[1]); - O << "("; - if (MI->getOperand(2).hasAllocatedReg() && - MI->getOperand(2).getReg() == PPC::R0) - O << "0"; - else - printOp(MI->getOperand(2)); - O << ")\n"; } else { for (i = 0; i < ArgCount; ++i) { // addi and friends