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Properly constrain register classes in 2-addr.

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X86 has 2-addr instructions with different constraints on the tied def
and use operands. One is GR32, one is GR32_NOSP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157149 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-05-20 06:38:32 +00:00
parent 4991de8fe1
commit 8e86929e3c
2 changed files with 7 additions and 1 deletions
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6
lib/CodeGen/TwoAddressInstructionPass.cpp
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@ -1555,6 +1555,12 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
MO.setIsKill(false);
RemovedKillFlag = true;
}
// Make sure regA is a legal regclass for the SrcIdx operand.
if (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB))
MRI->constrainRegClass(regA, MRI->getRegClass(regB));
MO.setReg(regA);
if (isCopy)

2
test/CodeGen/X86/shift-folding.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 | FileCheck %s
; RUN: llc < %s -march=x86 -verify-coalescing | FileCheck %s
define i32* @test1(i32* %P, i32 %X) {
; CHECK: test1: