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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-01 00:33:09 +00:00
Remove some empty statements
Cleanup only. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206710 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -502,7 +502,7 @@ void LTOModule::addAsmGlobalSymbolUndef(const char *name) {
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if (entry.getValue().name)
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return;
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uint32_t attr = LTO_SYMBOL_DEFINITION_UNDEFINED;;
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uint32_t attr = LTO_SYMBOL_DEFINITION_UNDEFINED;
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attr |= LTO_SYMBOL_SCOPE_DEFAULT;
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NameAndAttributes info;
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info.name = entry.getKey().data();
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@ -239,7 +239,7 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
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if (ARM::GPRPairRegClass.contains(RegBegin)) {
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const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
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unsigned Reg0 = TRI->getSubReg(RegBegin, ARM::gsub_0);
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O << ARMInstPrinter::getRegisterName(Reg0) << ", ";;
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O << ARMInstPrinter::getRegisterName(Reg0) << ", ";
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RegBegin = TRI->getSubReg(RegBegin, ARM::gsub_1);
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}
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O << ARMInstPrinter::getRegisterName(RegBegin);
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@ -409,7 +409,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF) const {
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do {
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MachineBasicBlock::iterator Push = DPRCSPush++;
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if (!HasFP) {
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CFAOffset -= sizeOfSPAdjustment(Push);;
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CFAOffset -= sizeOfSPAdjustment(Push);
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unsigned CFIIndex = MMI.addFrameInst(
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MCCFIInstruction::createDefCfaOffset(nullptr, CFAOffset));
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BuildMI(MBB, DPRCSPush, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
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@ -3209,7 +3209,7 @@ static bool originalTypeIsF128(const Type *Ty, const SDNode *CallNode) {
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MipsTargetLowering::MipsCC::SpecialCallingConvType
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MipsTargetLowering::getSpecialCallingConv(SDValue Callee) const {
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MipsCC::SpecialCallingConvType SpecialCallingConv =
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MipsCC::NoSpecialCallingConv;;
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MipsCC::NoSpecialCallingConv;
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if (Subtarget->inMips16HardFloat()) {
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if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
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llvm::StringRef Sym = G->getGlobal()->getName();
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@ -542,7 +542,7 @@ PredicateInstruction(MachineInstr *MI,
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MI->setDesc(get(CondOpcode));
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MachineInstrBuilder(*MI->getParent()->getParent(), MI)
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.addImm(CCValid).addImm(CCMask)
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.addReg(SystemZ::CC, RegState::Implicit);;
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.addReg(SystemZ::CC, RegState::Implicit);
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return true;
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}
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}
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@ -945,7 +945,7 @@ bool LoopReroll::reroll(Instruction *IV, Loop *L, BasicBlock *Header,
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bool InReduction = Reductions.isPairInSame(J1, J2);
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if (!(InReduction && J1->isAssociative())) {
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bool Swapped = false, SomeOpMatched = false;;
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bool Swapped = false, SomeOpMatched = false;
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for (unsigned j = 0; j < J1->getNumOperands() && !MatchFailed; ++j) {
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Value *Op2 = J2->getOperand(j);
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