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Delete ISD::INSERT_SUBREG and ISD::EXTRACT_SUBREG, which are unused.

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Note that these are distinct from TargetInstrInfo::INSERT_SUBREG
and TargetInstrInfo::EXTRACT_SUBREG, which are used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68355 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2009-04-03 00:25:26 +00:00
parent 25f0ee5191
commit 8f9643f0f7
5 changed files with 0 additions and 58 deletions
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12
include/llvm/CodeGen/SelectionDAGNodes.h
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@@ -327,18 +327,6 @@ namespace ISD {
/// elements 1 to N-1 of the N-element vector are undefined.
SCALAR_TO_VECTOR,
// EXTRACT_SUBREG - This node is used to extract a sub-register value.
// This node takes a superreg and a constant sub-register index as operands.
// Note sub-register indices must be increasing. That is, if the
// sub-register index of a 8-bit sub-register is N, then the index for a
// 16-bit sub-register must be at least N+1.
EXTRACT_SUBREG,
// INSERT_SUBREG - This node is used to insert a sub-register value.
// This node takes a superreg, a subreg value, and a constant sub-register
// index as operands.
INSERT_SUBREG,
// MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing
// an unsigned/signed value of type i[2*N], then return the top part.
MULHU, MULHS,