From 8ff9cd203ffd6bfba0b06696fe2ff83a85d4400c Mon Sep 17 00:00:00 2001 From: Justin Holewinski Date: Thu, 28 Apr 2011 00:19:53 +0000 Subject: [PATCH] PTX: support for fneg - selection of FNEG instruction - new fneg.ll test Patch by Dan Bailey git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130355 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PTX/PTXInstrInfo.td | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/lib/Target/PTX/PTXInstrInfo.td b/lib/Target/PTX/PTXInstrInfo.td index 921933e6ae7..959b85ebdde 100644 --- a/lib/Target/PTX/PTXInstrInfo.td +++ b/lib/Target/PTX/PTXInstrInfo.td @@ -182,6 +182,26 @@ def PTXcopyaddress // Instruction Class Templates //===----------------------------------------------------------------------===// +//===- Floating-Point Instructions - 2 Operand Form -----------------------===// +multiclass PTX_FLOAT_2OP { + def rr32 : InstPTX<(outs RRegf32:$d), + (ins RRegf32:$a), + !strconcat(opcstr, ".f32\t$d, $a"), + [(set RRegf32:$d, (opnode RRegf32:$a))]>; + def ri32 : InstPTX<(outs RRegf32:$d), + (ins f32imm:$a), + !strconcat(opcstr, ".f32\t$d, $a"), + [(set RRegf32:$d, (opnode fpimm:$a))]>; + def rr64 : InstPTX<(outs RRegf64:$d), + (ins RRegf64:$a), + !strconcat(opcstr, ".f64\t$d, $a"), + [(set RRegf64:$d, (opnode RRegf64:$a))]>; + def ri64 : InstPTX<(outs RRegf64:$d), + (ins f64imm:$a), + !strconcat(opcstr, ".f64\t$d, $a"), + [(set RRegf64:$d, (opnode fpimm:$a))]>; +} + //===- Floating-Point Instructions - 3 Operand Form -----------------------===// multiclass PTX_FLOAT_3OP { def rr32 : InstPTX<(outs RRegf32:$d), @@ -547,6 +567,9 @@ defm REM : INT3<"rem", urem>; ///===- Floating-Point Arithmetic Instructions ----------------------------===// +// Standard Unary Operations +defm FNEG : PTX_FLOAT_2OP<"neg", fneg>; + // Standard Binary Operations defm FADD : PTX_FLOAT_3OP<"add", fadd>; defm FSUB : PTX_FLOAT_3OP<"sub", fsub>;