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Fix encoding of 'U' bit for Thumb2 STRD/LDRD instructions. rdar://8755726
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121524 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -552,9 +552,9 @@ getAddrModeImm12OpValue(const MCInst &MI, unsigned OpIdx,
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uint32_t ARMMCCodeEmitter::
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uint32_t ARMMCCodeEmitter::
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getT2AddrModeImm8s4OpValue(const MCInst &MI, unsigned OpIdx,
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getT2AddrModeImm8s4OpValue(const MCInst &MI, unsigned OpIdx,
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SmallVectorImpl<MCFixup> &Fixups) const {
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SmallVectorImpl<MCFixup> &Fixups) const {
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// {17-13} = reg
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// {12-9} = reg
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// {12} = (U)nsigned (add == '1', sub == '0')
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// {8} = (U)nsigned (add == '1', sub == '0')
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// {11-0} = imm8
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// {7-0} = imm8
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unsigned Reg, Imm8;
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unsigned Reg, Imm8;
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bool isAdd = true;
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bool isAdd = true;
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// If The first operand isn't a register, we have a label reference.
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// If The first operand isn't a register, we have a label reference.
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@@ -576,7 +576,7 @@ getT2AddrModeImm8s4OpValue(const MCInst &MI, unsigned OpIdx,
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uint32_t Binary = (Imm8 >> 2) & 0xff;
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uint32_t Binary = (Imm8 >> 2) & 0xff;
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// Immediate is always encoded as positive. The 'U' bit controls add vs sub.
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// Immediate is always encoded as positive. The 'U' bit controls add vs sub.
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if (isAdd)
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if (isAdd)
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Binary |= (1 << 9);
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Binary |= (1 << 8);
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Binary |= (Reg << 9);
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Binary |= (Reg << 9);
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return Binary;
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return Binary;
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}
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}
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