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PowerPC: Expand VSELECT nodes.
There's probably a better expansion for those nodes than the default for altivec, but this is better than crashing. VSELECTs occur in loop vectorizer output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170551 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -376,6 +376,7 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
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setOperationAction(ISD::CTLZ_ZERO_UNDEF, VT, Expand);
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setOperationAction(ISD::CTLZ_ZERO_UNDEF, VT, Expand);
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setOperationAction(ISD::CTTZ, VT, Expand);
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setOperationAction(ISD::CTTZ, VT, Expand);
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setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand);
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setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand);
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setOperationAction(ISD::VSELECT, VT, Expand);
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setOperationAction(ISD::SIGN_EXTEND_INREG, VT, Expand);
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setOperationAction(ISD::SIGN_EXTEND_INREG, VT, Expand);
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for (unsigned j = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
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for (unsigned j = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
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7
test/CodeGen/PowerPC/vec_select.ll
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7
test/CodeGen/PowerPC/vec_select.ll
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@ -0,0 +1,7 @@
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; RUN: llc < %s -mtriple=powerpc64-linux-gnu -mattr=+altivec | FileCheck %s
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; CHECK: vsel_float
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define <4 x float> @vsel_float(<4 x float> %v1, <4 x float> %v2) {
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%vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x float> %v1, <4 x float> %v2
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ret <4 x float> %vsel
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}
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