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Modify the ppc backend to use two register classes for FP: F8RC and F4RC.

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These are used to represent float and double values, and the two regclasses
contain the same physical registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23577 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2005-10-01 01:35:02 +00:00
parent f85a55b096
commit 919c032fa4
9 changed files with 253 additions and 152 deletions
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2
lib/Target/PowerPC/PPCInstrInfo.cpp
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@@ -57,7 +57,7 @@ bool PPC32InstrInfo::isMoveInstr(const MachineInstr& MI,
destReg = MI.getOperand(0).getReg();
return true;
}
} else if (oc == PPC::FMR) { // fmr r1, r2
} else if (oc == PPC::FMRS || oc == PPC::FMRD) { // fmr r1, r2
assert(MI.getNumOperands() == 2 &&
MI.getOperand(0).isRegister() &&
MI.getOperand(1).isRegister() &&