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Implement fast-isel support for zero-extending from i1.

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It turns out that this is a fairly common operation,
and it's easy enough to handle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56990 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2008-10-03 01:28:47 +00:00
parent 4e6ed5eefd
commit 91b6f97ce4
1 changed files with 12 additions and 1 deletions
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13
lib/CodeGen/SelectionDAG/FastISel.cpp
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@ -386,10 +386,21 @@ bool FastISel::SelectCast(User *I, ISD::NodeType Opcode) {
if (SrcVT == MVT::Other || !SrcVT.isSimple() ||
DstVT == MVT::Other || !DstVT.isSimple() ||
!TLI.isTypeLegal(SrcVT) || !TLI.isTypeLegal(DstVT))
!TLI.isTypeLegal(DstVT))
// Unhandled type. Halt "fast" selection and bail.
return false;
// Check if the source operand is legal. Or as a special case,
// it may be i1 if we're doing zero-extension because that's
// trivially easy and somewhat common.
if (!TLI.isTypeLegal(SrcVT)) {
if (SrcVT == MVT::i1 && Opcode == ISD::ZERO_EXTEND)
SrcVT = TLI.getTypeToTransformTo(SrcVT);
else
// Unhandled type. Halt "fast" selection and bail.
return false;
}
unsigned InputReg = getRegForValue(I->getOperand(0));
if (!InputReg)
// Unhandled operand. Halt "fast" selection and bail.