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ARM: change attribute tests to use parsed form

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This makes the tests more readable by using the -arm-attributes decoding support
in llvm-readobj since that is now available.  Change the invocation commands to
be similar to other test and use a more precise triple (the tests only require
ARM EABI support).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201029 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Saleem Abdulrasool 2014-02-08 23:17:02 +00:00
parent 846acbeef1
commit 91ec991b45
28 changed files with 640 additions and 525 deletions
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38
test/MC/ARM/directive-arch-armv2.s
View File

@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv2 architecture. @ armv2 architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv2 .arch armv2
@ CHECK-ASM: .arch armv2 @ CHECK-ASM: .arch armv2
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 2
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 23 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v4
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05320006 010801 |.2.....| @ CHECK-ATTR: }
@ CHECK-OBJ: )

38
test/MC/ARM/directive-arch-armv2a.s
View File

@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv2a architecture. @ armv2a architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv2a .arch armv2a
@ CHECK-ASM: .arch armv2a @ CHECK-ASM: .arch armv2a
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 2A
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 24 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v4
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05324100 06010801 |.2A.....| @ CHECK-ATTR: }
@ CHECK-OBJ: )

38
test/MC/ARM/directive-arch-armv3.s
View File

@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv3 architecture. @ armv3 architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv3 .arch armv3
@ CHECK-ASM: .arch armv3 @ CHECK-ASM: .arch armv3
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 3
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 23 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v4
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05330006 010801 |.3.....| @ CHECK-ATTR: }
@ CHECK-OBJ: )

38
test/MC/ARM/directive-arch-armv3m.s
View File

@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv3m architecture. @ armv3m architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv3m .arch armv3m
@ CHECK-ASM: .arch armv3m @ CHECK-ASM: .arch armv3m
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 3M
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 24 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v4
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05334D00 06010801 |.3M.....| @ CHECK-ATTR: }
@ CHECK-OBJ: )

39
test/MC/ARM/directive-arch-armv4.s
View File

@ -3,32 +3,30 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv4 architecture. @ armv4 architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv4 .arch armv4
@ CHECK-ASM: .arch armv4 @ CHECK-ASM: .arch armv4
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 4
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x{{[0-9A-F]*}} @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 23 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v4
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05340006 010801 |.4.....| @ CHECK-ATTR: }
@ CHECK-OBJ: )
@ Check that multiplication is supported @ Check that multiplication is supported
mul r4, r5, r6 mul r4, r5, r6
@ -37,3 +35,4 @@
umull r4, r5, r6, r3 umull r4, r5, r6, r3
smlal r4, r5, r6, r3 smlal r4, r5, r6, r3
umlal r4, r5, r6, r3 umlal r4, r5, r6, r3

42
test/MC/ARM/directive-arch-armv4t.s
View File

@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv4t architecture. @ armv4t architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv4t .arch armv4t
@ CHECK-ASM: .arch armv4t @ CHECK-ASM: .arch armv4t
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 4T
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 26 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v4T
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05345400 06020801 0901 |.4T.......| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-1
@ CHECK-ATTR: }
@ CHECK-ATTR: }

38
test/MC/ARM/directive-arch-armv5.s
View File

@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv5 architecture. @ armv5 architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv5 .arch armv5
@ CHECK-ASM: .arch armv5 @ CHECK-ASM: .arch armv5
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 5
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 23 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v5T
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05350006 030801 |.5.....| @ CHECK-ATTR: }
@ CHECK-OBJ: )

42
test/MC/ARM/directive-arch-armv5t.s
View File

@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv5t architecture. @ armv5t architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv5t .arch armv5t
@ CHECK-ASM: .arch armv5t @ CHECK-ASM: .arch armv5t
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 5T
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 26 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v5T
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05355400 06030801 0901 |.5T.......| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-1
@ CHECK-ATTR: }
@ CHECK-ATTR: }

42
test/MC/ARM/directive-arch-armv5te.s
View File

@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv5te architecture. @ armv5te architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv5te .arch armv5te
@ CHECK-ASM: .arch armv5te @ CHECK-ASM: .arch armv5te
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 5TE
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 27 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v5TE
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05355445 00060408 010901 |.5TE.......| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-1
@ CHECK-ATTR: }
@ CHECK-ATTR: }

38
test/MC/ARM/directive-arch-armv6-m.s
View File

@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv6-m architecture. @ armv6-m architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv6-m .arch armv6-m
@ CHECK-ASM: .arch armv6-m @ CHECK-ASM: .arch armv6-m
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 6-M
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 25 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v6-M
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Thumb-1
@ CHECK-OBJ: 0000: 41180000 00616561 62690001 0E000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05362D4D 00060B09 01 |.6-M.....| @ CHECK-ATTR: }
@ CHECK-OBJ: )

42
test/MC/ARM/directive-arch-armv6.s
View File

@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv6 architecture. @ armv6 architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv6 .arch armv6
@ CHECK-ASM: .arch armv6 @ CHECK-ASM: .arch armv6
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 6
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 25 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v6
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 41180000 00616561 62690001 0E000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05360006 06080109 01 |.6.......| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-1
@ CHECK-ATTR: }
@ CHECK-ATTR: }

42
test/MC/ARM/directive-arch-armv6j.s
View File

@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv6j architecture. @ armv6j architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv6j .arch armv6j
@ CHECK-ASM: .arch armv6j @ CHECK-ASM: .arch armv6j
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 6J
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 26 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v6
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05364A00 06060801 0901 |.6J.......| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-1
@ CHECK-ATTR: }
@ CHECK-ATTR: }

42
test/MC/ARM/directive-arch-armv6t2.s
View File

@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv6t2 architecture. @ armv6t2 architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv6t2 .arch armv6t2
@ CHECK-ASM: .arch armv6t2 @ CHECK-ASM: .arch armv6t2
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 6T2
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 27 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v6T2
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05365432 00060808 010902 |.6T2.......| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-2
@ CHECK-ATTR: }
@ CHECK-ATTR: }

46
test/MC/ARM/directive-arch-armv6z.s
View File

@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv6z architecture. @ armv6z architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv6z .arch armv6z
@ CHECK-ASM: .arch armv6z @ CHECK-ASM: .arch armv6z
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 6Z
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 28 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v6KZ
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 411B0000 00616561 62690001 11000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05365A00 06070801 09014401 |.6Z.......D.| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-1
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: Virtualization_use
@ CHECK-ATTR: Description: TrustZone
@ CHECK-ATTR: }
@ CHECK-ATTR: }

46
test/MC/ARM/directive-arch-armv6zk.s
View File

@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv6zk architecture. @ armv6zk architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv6zk .arch armv6zk
@ CHECK-ASM: .arch armv6zk @ CHECK-ASM: .arch armv6zk
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 6ZK
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 29 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v6KZ
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05365A4B 00060708 01090144 01 |.6ZK.......D.| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-1
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: Virtualization_use
@ CHECK-ATTR: Description: TrustZone
@ CHECK-ATTR: }
@ CHECK-ATTR: }

46
test/MC/ARM/directive-arch-armv7-a.s
View File

@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv7-a architecture. @ armv7-a architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv7-a .arch armv7-a
@ CHECK-ASM: .arch armv7-a @ CHECK-ASM: .arch armv7-a
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 7-A
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 29 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v7
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: CPU_arch_profile
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Application
@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05372D41 00060A07 41080109 02 |.7-A....A....| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-ATTR: Description: Permitted
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-2
@ CHECK-ATTR: }
@ CHECK-ATTR: }

42
test/MC/ARM/directive-arch-armv7-m.s
View File

@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv7-m architecture. @ armv7-m architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv7-m .arch armv7-m
@ CHECK-ASM: .arch armv7-m @ CHECK-ASM: .arch armv7-m
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 7-M
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 27 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v7
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: CPU_arch_profile
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Microcontroller
@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05372D4D 00060A07 4D0902 |.7-M....M..| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-2
@ CHECK-ATTR: }
@ CHECK-ATTR: }

46
test/MC/ARM/directive-arch-armv7-r.s
View File

@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv7-r architecture. @ armv7-r architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv7-r .arch armv7-r
@ CHECK-ASM: .arch armv7-r @ CHECK-ASM: .arch armv7-r
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 7-R
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 29 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v7
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: CPU_arch_profile
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Real-time
@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05372D52 00060A07 52080109 02 |.7-R....R....| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-ATTR: Description: Permitted
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-2
@ CHECK-ATTR: }
@ CHECK-ATTR: }

38
test/MC/ARM/directive-arch-armv7.s
View File

@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv7 architecture. @ armv7 architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv7 .arch armv7
@ CHECK-ASM: .arch armv7 @ CHECK-ASM: .arch armv7
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 7
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 23 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v7
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Thumb-2
@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05370006 0A0902 |.7.....| @ CHECK-ATTR: }
@ CHECK-OBJ: )

46
test/MC/ARM/directive-arch-armv7a.s
View File

@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv7-a architecture when using the armv7a alias. @ armv7-a architecture when using the armv7a alias.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv7a .arch armv7a
@ CHECK-ASM: .arch armv7-a @ CHECK-ASM: .arch armv7-a
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 7-A
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 29 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v7
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: CPU_arch_profile
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Application
@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05372D41 00060A07 41080109 02 |.7-A....A....| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-ATTR: Description: Permitted
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-2
@ CHECK-ATTR: }
@ CHECK-ATTR: }

42
test/MC/ARM/directive-arch-armv7m.s
View File

@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv7-m architecture when using the armv7m alias. @ armv7-m architecture when using the armv7m alias.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv7m .arch armv7m
@ CHECK-ASM: .arch armv7-m @ CHECK-ASM: .arch armv7-m
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 7-M
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 27 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v7
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: CPU_arch_profile
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Microcontroller
@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05372D4D 00060A07 4D0902 |.7-M....M..| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-2
@ CHECK-ATTR: }
@ CHECK-ATTR: }

46
test/MC/ARM/directive-arch-armv7r.s
View File

@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv7-r architecture when using the armv7r alias. @ armv7-r architecture when using the armv7r alias.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv7r .arch armv7r
@ CHECK-ASM: .arch armv7-r @ CHECK-ASM: .arch armv7-r
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 7-R
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 29 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v7
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: CPU_arch_profile
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Real-time
@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05372D52 00060A07 52080109 02 |.7-R....R....| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-ATTR: Description: Permitted
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-2
@ CHECK-ATTR: }
@ CHECK-ATTR: }

55
test/MC/ARM/directive-arch-armv8-a.s
View File

@ -3,29 +3,44 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv8-a architecture. @ armv8-a architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv8-a .arch armv8-a
@ CHECK-ASM: .arch armv8-a @ CHECK-ASM: .arch armv8-a
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 8-A
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 33 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v8
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: CPU_arch_profile
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Application
@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05382D41 00060E07 41080109 022A0144 |.8-A....A....*.D| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: 0020: 03 |.| @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: ) @ CHECK-ATTR: Description: Permitted
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-2
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: MPextension_use
@ CHECK-ATTR: Description: Permitted
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: Virtualization_use
@ CHECK-ATTR: Description: TrustZone + Virtualization Extensions
@ CHECK-ATTR: }
@ CHECK-ATTR: }

55
test/MC/ARM/directive-arch-armv8a.s
View File

@ -3,29 +3,44 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ armv8-a architecture when using the armv8a alias. @ armv8-a architecture when using the armv8a alias.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch armv8a .arch armv8a
@ CHECK-ASM: .arch armv8-a @ CHECK-ASM: .arch armv8-a
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: 8-A
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 33 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v8
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: CPU_arch_profile
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Application
@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 05382D41 00060E07 41080109 022A0144 |.8-A....A....*.D| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: 0020: 03 |.| @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: ) @ CHECK-ATTR: Description: Permitted
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-2
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: MPextension_use
@ CHECK-ATTR: Description: Permitted
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: Virtualization_use
@ CHECK-ATTR: Description: TrustZone + Virtualization Extensions
@ CHECK-ATTR: }
@ CHECK-ATTR: }

46
test/MC/ARM/directive-arch-iwmmxt.s
View File

@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ iwmmxt architecture. @ iwmmxt architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch iwmmxt .arch iwmmxt
@ CHECK-ASM: .arch iwmmxt @ CHECK-ASM: .arch iwmmxt
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: IWMMXT
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 32 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v5TE
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 411F0000 00616561 62690001 15000000 |A....aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 0549574D 4D585400 06040801 09010B01 |.IWMMXT.........| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: ) @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-1
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: WMMX_arch
@ CHECK-ATTR: Description: WMMXv1
@ CHECK-ATTR: }
@ CHECK-ATTR: }

47
test/MC/ARM/directive-arch-iwmmxt2.s
View File

@ -3,29 +3,36 @@
@ This test case will check the default .ARM.attributes value for the @ This test case will check the default .ARM.attributes value for the
@ iwmmxt2 architecture. @ iwmmxt2 architecture.
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM @ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.arch iwmmxt2 .arch iwmmxt2
@ CHECK-ASM: .arch iwmmxt2 @ CHECK-ASM: .arch iwmmxt2
@ CHECK-OBJ: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Flags [ (0x0) @ CHECK-ATTR: TagName: CPU_name
@ CHECK-OBJ: ] @ CHECK-ATTR: Value: IWMMXT2
@ CHECK-OBJ: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-OBJ: Offset: 0x34 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: Size: 33 @ CHECK-ATTR: TagName: CPU_arch
@ CHECK-OBJ: Link: 0 @ CHECK-ATTR: Description: ARM v5TE
@ CHECK-OBJ: Info: 0 @ CHECK-ATTR: }
@ CHECK-OBJ: AddressAlignment: 1 @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: EntrySize: 0 @ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-OBJ: SectionData ( @ CHECK-ATTR: Description: Permitted
@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......| @ CHECK-ATTR: }
@ CHECK-OBJ: 0010: 0549574D 4D585432 00060408 0109010B |.IWMMXT2........| @ CHECK-ATTR: Attribute {
@ CHECK-OBJ: 0020: 02 |.| @ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-OBJ: ) @ CHECK-ATTR: Description: Thumb-1
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: WMMX_arch
@ CHECK-ATTR: Description: WMMXv2
@ CHECK-ATTR: }
@ CHECK-ATTR: }

19
test/MC/ARM/directive-eabi_attribute-overwrite.s
View File

@ -1,5 +1,5 @@
@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s | llvm-readobj -s -sd \ @ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s \
@ RUN: | FileCheck %s @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified .syntax unified
.thumb .thumb
@ -7,12 +7,11 @@
.eabi_attribute Tag_compatibility, 1 .eabi_attribute Tag_compatibility, 1
.eabi_attribute Tag_compatibility, 1, "aeabi" .eabi_attribute Tag_compatibility, 1, "aeabi"
@ CHECK: Section { @ CHECK-ATTR: FileAttributes {
@ CHECK: Name: .ARM.attributes @ CHECK-ATTR: Attribute {
@ CHECK: Type: SHT_ARM_ATTRIBUTES @ CHECK-ATTR: Value: 1, AEABI
@ CHECK: SectionData ( @ CHECK-ATTR: TagName: compatibility
@ CHECK: 0000: 41170000 00616561 62690001 0D000000 @ CHECK-ATTR: Description: AEABI Conformant
@ CHECK: 0010: 20014145 41424900 @ CHECK-ATTR: }
@ CHECK: ) @ CHECK-ATTR: }
@ CHECK: }

26
test/MC/ARM/directive-fpu-multiple.s
View File

@ -3,24 +3,16 @@
@ The later .fpu directive should overwrite the earlier one. @ The later .fpu directive should overwrite the earlier one.
@ See also: directive-fpu-multiple2.s. @ See also: directive-fpu-multiple2.s.
@ RUN: llvm-mc < %s -triple arm-unknown-linux-gnueabi -filetype=obj \ @ RUN: llvm-mc -triple arm-eabi -filetype obj %s | llvm-readobj -arm-attributes \
@ RUN: | llvm-readobj -s -sd | FileCheck %s @ RUN: | FileCheck %s -check-prefix CHECK-ATTR
.fpu neon .fpu neon
.fpu vfpv4 .fpu vfpv4
@ CHECK: Name: .ARM.attributes @ CHECK-ATTR: FileAttributes {
@ CHECK-NEXT: Type: SHT_ARM_ATTRIBUTES (0x70000003) @ CHECK-ATTR: Attribute {
@ CHECK-NEXT: Flags [ (0x0) @ CHECK-ATTR: TagName: FP_arch
@ CHECK-NEXT: ] @ CHECK-ATTR: Description: VFPv4
@ CHECK-NEXT: Address: 0x0 @ CHECK-ATTR: }
@ CHECK-NEXT: Offset: 0x34 @ CHECK-ATTR: }
@ CHECK-NEXT: Size: 18
@ CHECK-NEXT: Link: 0
@ CHECK-NEXT: Info: 0
@ CHECK-NEXT: AddressAlignment: 1
@ CHECK-NEXT: EntrySize: 0
@ CHECK-NEXT: SectionData (
@ CHECK-NEXT: 0000: 41110000 00616561 62690001 07000000
@ CHECK-NEXT: 0010: 0A05
@ CHECK-NEXT: )