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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-09 10:31:14 +00:00
Added initial support for small sections on Mips.
Added gp_rel relocations to support addressing small section contents. Added command line to specify small section threshold in bytes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53869 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -360,6 +360,10 @@ printOperand(const MachineInstr *MI, int opNum)
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closeP = true;
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} else if ((MI->getOpcode() == Mips::ADDiu) && !MO.isRegister()
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&& !MO.isImmediate()) {
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const MachineOperand &firstMO = MI->getOperand(opNum-1);
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if (firstMO.getReg() == Mips::GP)
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O << "%gp_rel(";
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else
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O << "%lo(";
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closeP = true;
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} else if ((isPIC) && (MI->getOpcode() == Mips::LW)
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@ -490,14 +494,13 @@ printModuleLevelGV(const GlobalVariable* GVar) {
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Constant *C = GVar->getInitializer();
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const Type *CTy = C->getType();
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unsigned Size = TD->getABITypeSize(CTy);
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const ConstantArray *CVA = dyn_cast<ConstantArray>(C);
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bool printSizeAndType = true;
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// A data structure or array is aligned in memory to the largest
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// alignment boundary required by any data type inside it (this matches
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// the Preferred Type Alignment). For integral types, the alignment is
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// the type size.
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//unsigned Align = TD->getPreferredAlignmentLog(I);
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//unsigned Align = TD->getPrefTypeAlignment(C->getType());
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unsigned Align;
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if (CTy->getTypeID() == Type::IntegerTyID ||
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CTy->getTypeID() == Type::VoidTyID) {
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@ -546,6 +549,8 @@ printModuleLevelGV(const GlobalVariable* GVar) {
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O << TAI->getGlobalDirective() << name << '\n';
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// Fall Through
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case GlobalValue::InternalLinkage:
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if (CVA && CVA->isCString())
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printSizeAndType = false;
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break;
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case GlobalValue::GhostLinkage:
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cerr << "Should not have any unmaterialized functions!\n";
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@ -20,6 +20,7 @@
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#include "MipsSubtarget.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Function.h"
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#include "llvm/GlobalVariable.h"
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#include "llvm/Intrinsics.h"
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#include "llvm/CallingConv.h"
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#include "llvm/CodeGen/CallingConvLower.h"
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@ -43,6 +44,7 @@ getTargetNodeName(unsigned Opcode) const
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case MipsISD::JmpLink : return "MipsISD::JmpLink";
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case MipsISD::Hi : return "MipsISD::Hi";
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case MipsISD::Lo : return "MipsISD::Lo";
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case MipsISD::GPRel : return "MipsISD::GPRel";
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case MipsISD::Ret : return "MipsISD::Ret";
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case MipsISD::SelectCC : return "MipsISD::SelectCC";
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case MipsISD::FPBrcond : return "MipsISD::FPBrcond";
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@ -89,8 +91,6 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM)
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setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
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// Operations not directly supported by Mips.
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setConvertAction(MVT::f64, MVT::f32, Expand);
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setOperationAction(ISD::BR_JT, MVT::Other, Expand);
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setOperationAction(ISD::BR_CC, MVT::Other, Expand);
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setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
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@ -234,34 +234,71 @@ AddLiveIn(MachineFunction &MF, unsigned PReg, TargetRegisterClass *RC)
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return VReg;
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}
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// Discover if this global address can be placed into small data/bss section.
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// This should happen for globals with size less than small section size
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// threshold in no abicall environments. Data in this section must be addressed
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// using gp_rel operator.
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bool MipsTargetLowering::IsGlobalInSmallSection(GlobalValue *GV)
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{
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const TargetData *TD = getTargetData();
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const Value *V = dyn_cast<Value>(GV);
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const GlobalVariable *GVA = dyn_cast<GlobalVariable>(V);
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//const PointerType *PTy = GV->getType();
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const Type *Ty = GV->getType()->getElementType();
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unsigned Size = TD->getABITypeSize(Ty);
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// if this is a internal constant string, there is a special
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// section for it, but not in small data/bss.
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if (GVA->hasInitializer() && GV->hasInternalLinkage()) {
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Constant *C = GVA->getInitializer();
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const ConstantArray *CVA = dyn_cast<ConstantArray>(C);
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if (CVA && CVA->isCString())
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return false;
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}
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if (Size > 0 && (Size <= Subtarget->getSSectionThreshold()))
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return true;
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return false;
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}
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//===----------------------------------------------------------------------===//
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// Misc Lower Operation implementation
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//===----------------------------------------------------------------------===//
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SDOperand MipsTargetLowering::
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LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG)
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{
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SDOperand ResNode;
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GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
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SDOperand GA = DAG.getTargetGlobalAddress(GV, MVT::i32);
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bool isPIC = (getTargetMachine().getRelocationModel() == Reloc::PIC_);
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SDOperand HiPart;
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if (!isPIC) {
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if (!Subtarget->hasABICall()) {
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if (isa<Function>(GV)) return GA;
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const MVT *VTs = DAG.getNodeValueTypes(MVT::i32);
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SDOperand Ops[] = { GA };
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HiPart = DAG.getNode(MipsISD::Hi, VTs, 1, Ops, 1);
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} else // Emit Load from Global Pointer
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HiPart = DAG.getLoad(MVT::i32, DAG.getEntryNode(), GA, NULL, 0);
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if (IsGlobalInSmallSection(GV)) { // %gp_rel relocation
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SDOperand GPRelNode = DAG.getNode(MipsISD::GPRel, VTs, 1, Ops, 1);
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SDOperand GOT = DAG.getNode(ISD::GLOBAL_OFFSET_TABLE, MVT::i32);
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return DAG.getNode(ISD::ADD, MVT::i32, GOT, GPRelNode);
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}
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// %hi/%lo relocation
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SDOperand HiPart = DAG.getNode(MipsISD::Hi, VTs, 1, Ops, 1);
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SDOperand Lo = DAG.getNode(MipsISD::Lo, MVT::i32, GA);
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return DAG.getNode(ISD::ADD, MVT::i32, HiPart, Lo);
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} else { // Abicall relocations, TODO: make this cleaner.
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SDOperand ResNode = DAG.getLoad(MVT::i32, DAG.getEntryNode(), GA, NULL, 0);
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// On functions and global targets not internal linked only
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// a load from got/GP is necessary for PIC to work.
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if ((isPIC) && ((!GV->hasInternalLinkage()) || (isa<Function>(GV))))
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return HiPart;
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SDOperand Lo = DAG.getNode(MipsISD::Lo, MVT::i32, GA);
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ResNode = DAG.getNode(ISD::ADD, MVT::i32, HiPart, Lo);
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if (!GV->hasInternalLinkage() || isa<Function>(GV))
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return ResNode;
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SDOperand Lo = DAG.getNode(MipsISD::Lo, MVT::i32, GA);
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return DAG.getNode(ISD::ADD, MVT::i32, ResNode, Lo);
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}
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assert(0 && "Dont know how to handle GlobalAddress");
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return SDOperand(0,0);
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}
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SDOperand MipsTargetLowering::
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@ -596,8 +633,7 @@ LowerCCCArguments(SDOperand Op, SelectionDAG &DAG)
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unsigned StackReg = MF.getTarget().getRegisterInfo()->getFrameRegister(MF);
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// GP holds the GOT address on PIC calls.
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if (getTargetMachine().getRelocationModel() == Reloc::PIC_)
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// GP must be live into PIC and non-PIC call target.
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AddLiveIn(MF, Mips::GP, Mips::CPURegsRegisterClass);
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// Assign locations to all of the incoming arguments.
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@ -37,6 +37,9 @@ namespace llvm {
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// No relation with Mips Lo register
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Lo,
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// Handle gp_rel (small data/bss sections) relocation.
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GPRel,
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// Select CC Pseudo Instruction
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SelectCC,
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@ -83,7 +86,7 @@ namespace llvm {
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SDOperand LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG, unsigned CC);
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SDNode *LowerCallResult(SDOperand Chain, SDOperand InFlag, SDNode*TheCall,
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unsigned CallingConv, SelectionDAG &DAG);
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SDOperand getReturnAddressFrameIndex(SelectionDAG &DAG);
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bool IsGlobalInSmallSection(GlobalValue *GV);
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// Lower Operand specifics
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SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG);
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@ -31,9 +31,9 @@ def MipsJmpLink : SDNode<"MipsISD::JmpLink",SDT_MipsJmpLink, [SDNPHasChain,
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// Hi and Lo nodes are used to handle global addresses. Used on
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// MipsISelLowering to lower stuff like GlobalAddress, ExternalSymbol
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// static model. (nothing to do with Mips Registers Hi and Lo)
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//def MipsHi : SDNode<"MipsISD::Hi", SDTIntUnaryOp, [SDNPOutFlag]>;
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def MipsHi : SDNode<"MipsISD::Hi", SDTIntUnaryOp>;
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def MipsLo : SDNode<"MipsISD::Lo", SDTIntUnaryOp>;
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def MipsGPRel : SDNode<"MipsISD::GPRel", SDTIntUnaryOp>;
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// Return
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def MipsRet : SDNode<"MipsISD::Ret", SDT_MipsRet, [SDNPHasChain,
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@ -555,13 +555,15 @@ def : Pat<(MipsJmpLink CPURegs:$dst),
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// GlobalAddress, Constant Pool, ExternalSymbol, and JumpTable
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def : Pat<(MipsHi tglobaladdr:$in), (LUi tglobaladdr:$in)>;
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def : Pat<(MipsLo tglobaladdr:$in), (ADDiu ZERO, tglobaladdr:$in)>;
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//def : Pat<(MipsLo tglobaladdr:$in), (ADDiu ZERO, tglobaladdr:$in)>;
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def : Pat<(add CPURegs:$hi, (MipsLo tglobaladdr:$lo)),
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(ADDiu CPURegs:$hi, tglobaladdr:$lo)>;
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def : Pat<(MipsHi tjumptable:$in), (LUi tjumptable:$in)>;
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def : Pat<(MipsLo tjumptable:$in), (ADDiu ZERO, tjumptable:$in)>;
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//def : Pat<(MipsLo tjumptable:$in), (ADDiu ZERO, tjumptable:$in)>;
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def : Pat<(add CPURegs:$hi, (MipsLo tjumptable:$lo)),
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(ADDiu CPURegs:$hi, tjumptable:$lo)>;
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def : Pat<(add CPURegs:$gp, (MipsGPRel tglobaladdr:$in)),
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(ADDiu CPURegs:$gp, tglobaladdr:$in)>;
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// Mips does not have "not", so we expand our way
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def : Pat<(not CPURegs:$in),
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@ -22,6 +22,9 @@ cl::opt<bool> NotABICall("disable-mips-abicall", cl::Hidden,
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cl::desc("Disable code for SVR4-style dynamic objects"));
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cl::opt<bool> AbsoluteCall("enable-mips-absolute-call", cl::Hidden,
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cl::desc("Enable absolute call within abicall"));
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cl::opt<unsigned> SSThreshold("mips-ssection-threshold", cl::Hidden,
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cl::desc("Small data and bss section threshold size (default=8)"),
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cl::init(8));
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MipsSubtarget::MipsSubtarget(const TargetMachine &TM, const Module &M,
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const std::string &FS, bool little) :
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@ -35,6 +38,9 @@ MipsSubtarget::MipsSubtarget(const TargetMachine &TM, const Module &M,
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ParseSubtargetFeatures(FS, CPU);
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const std::string& TT = M.getTargetTriple();
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// Small section size threshold
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SSectionThreshold = SSThreshold;
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// Is the target system Linux ?
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if (TT.find("linux") == std::string::npos)
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IsLinux = false;
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@ -71,6 +71,10 @@ protected:
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// isLinux - Target system is Linux. Is false we consider ELFOS for now.
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bool IsLinux;
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// Put global and static items less than or equal to SSectionThreshold
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// bytes into the small data or bss section. The default is 8.
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unsigned SSectionThreshold;
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InstrItineraryData InstrItins;
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public:
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@ -102,6 +106,7 @@ public:
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bool hasABICall() const { return HasABICall; };
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bool hasAbsoluteCall() const { return HasAbsoluteCall; };
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bool isLinux() const { return IsLinux; };
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unsigned getSSectionThreshold() const { return SSectionThreshold; }
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};
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} // End llvm namespace
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@ -31,6 +31,7 @@ MipsTargetAsmInfo::MipsTargetAsmInfo(const MipsTargetMachine &TM):
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ZeroDirective = "\t.space\t";
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BSSSection = "\t.section\t.bss";
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LCOMMDirective = "\t.lcomm\t";
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CStringSection = ".rodata.str";
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if (!TM.getSubtarget<MipsSubtarget>().hasABICall())
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JumpTableDirective = "\t.word\t";
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