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LDM writeback is not allowed if Rn is in the target register list.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139432 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2011-09-09 23:13:33 +00:00
parent 112fb73502
commit 921d01ae1f
2 changed files with 24 additions and 0 deletions
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19
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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@ -918,12 +918,31 @@ static DecodeStatus DecodeRegListOperand(llvm::MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) { uint64_t Address, const void *Decoder) {
DecodeStatus S = MCDisassembler::Success; DecodeStatus S = MCDisassembler::Success;
bool writebackLoad = false;
unsigned writebackReg = 0;
switch (Inst.getOpcode()) {
default:
break;
case ARM::LDMIA_UPD:
case ARM::LDMDB_UPD:
case ARM::LDMIB_UPD:
case ARM::LDMDA_UPD:
case ARM::t2LDMIA_UPD:
case ARM::t2LDMDB_UPD:
writebackLoad = true;
writebackReg = Inst.getOperand(0).getReg();
break;
}
// Empty register lists are not allowed. // Empty register lists are not allowed.
if (CountPopulation_32(Val) == 0) return MCDisassembler::Fail; if (CountPopulation_32(Val) == 0) return MCDisassembler::Fail;
for (unsigned i = 0; i < 16; ++i) { for (unsigned i = 0; i < 16; ++i) {
if (Val & (1 << i)) { if (Val & (1 << i)) {
if (!Check(S, DecodeGPRRegisterClass(Inst, i, Address, Decoder))) if (!Check(S, DecodeGPRRegisterClass(Inst, i, Address, Decoder)))
return MCDisassembler::Fail; return MCDisassembler::Fail;
// Writeback not allowed if Rn is in the target list.
if (writebackLoad && writebackReg == Inst.end()[-1].getReg())
Check(S, MCDisassembler::SoftFail);
} }
} }

5
test/MC/Disassembler/ARM/invalid-LDM-thumb.txt Normal file
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@ -0,0 +1,5 @@
# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 |& grep {potentially undefined instruction encoding}
# Writeback is not allowed is Rn is in the target register list.
0xb4 0xe8 0x34 0x04