mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-15 23:31:37 +00:00
LDM writeback is not allowed if Rn is in the target register list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139432 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
112fb73502
commit
921d01ae1f
@ -918,12 +918,31 @@ static DecodeStatus DecodeRegListOperand(llvm::MCInst &Inst, unsigned Val,
|
||||
uint64_t Address, const void *Decoder) {
|
||||
DecodeStatus S = MCDisassembler::Success;
|
||||
|
||||
bool writebackLoad = false;
|
||||
unsigned writebackReg = 0;
|
||||
switch (Inst.getOpcode()) {
|
||||
default:
|
||||
break;
|
||||
case ARM::LDMIA_UPD:
|
||||
case ARM::LDMDB_UPD:
|
||||
case ARM::LDMIB_UPD:
|
||||
case ARM::LDMDA_UPD:
|
||||
case ARM::t2LDMIA_UPD:
|
||||
case ARM::t2LDMDB_UPD:
|
||||
writebackLoad = true;
|
||||
writebackReg = Inst.getOperand(0).getReg();
|
||||
break;
|
||||
}
|
||||
|
||||
// Empty register lists are not allowed.
|
||||
if (CountPopulation_32(Val) == 0) return MCDisassembler::Fail;
|
||||
for (unsigned i = 0; i < 16; ++i) {
|
||||
if (Val & (1 << i)) {
|
||||
if (!Check(S, DecodeGPRRegisterClass(Inst, i, Address, Decoder)))
|
||||
return MCDisassembler::Fail;
|
||||
// Writeback not allowed if Rn is in the target list.
|
||||
if (writebackLoad && writebackReg == Inst.end()[-1].getReg())
|
||||
Check(S, MCDisassembler::SoftFail);
|
||||
}
|
||||
}
|
||||
|
||||
|
5
test/MC/Disassembler/ARM/invalid-LDM-thumb.txt
Normal file
5
test/MC/Disassembler/ARM/invalid-LDM-thumb.txt
Normal file
@ -0,0 +1,5 @@
|
||||
# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 |& grep {potentially undefined instruction encoding}
|
||||
|
||||
# Writeback is not allowed is Rn is in the target register list.
|
||||
|
||||
0xb4 0xe8 0x34 0x04
|
Loading…
x
Reference in New Issue
Block a user