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Don't swap the operands of a subtraction when trying to create a

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post-decrement load/store.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81464 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson 2009-09-10 22:09:31 +00:00
parent db2659be58
commit 92ad363f58
2 changed files with 12 additions and 1 deletions
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2
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -4715,7 +4715,7 @@ bool DAGCombiner::CombineToPostIndexedLoadStore(SDNode *N) {
SDValue Offset; SDValue Offset;
ISD::MemIndexedMode AM = ISD::UNINDEXED; ISD::MemIndexedMode AM = ISD::UNINDEXED;
if (TLI.getPostIndexedAddressParts(N, Op, BasePtr, Offset, AM, DAG)) { if (TLI.getPostIndexedAddressParts(N, Op, BasePtr, Offset, AM, DAG)) {
if (Ptr == Offset) if (Ptr == Offset && Op->getOpcode() == ISD::ADD)
std::swap(BasePtr, Offset); std::swap(BasePtr, Offset);
if (Ptr != BasePtr) if (Ptr != BasePtr)
continue; continue;

11
test/CodeGen/ARM/2009-09-10-postdec.ll Normal file
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@ -0,0 +1,11 @@
; RUN: llc -march=arm < %s | FileCheck %s
; Radar 7213850
define i32 @test(i8* %d, i32 %x, i32 %y) nounwind {
%1 = ptrtoint i8* %d to i32
;CHECK: sub
%2 = sub i32 %x, %1
%3 = add nsw i32 %2, %y
store i8 0, i8* %d, align 1
ret i32 %3
}