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Update some stuff now that the new rlwimi code has gone in
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28162 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -405,7 +405,6 @@ SDNode *PPCDAGToDAGISel::SelectBitfieldInsert(SDNode *N) {
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TLI.ComputeMaskedBits(Op0, TgtMask, LKZ, LKO);
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TLI.ComputeMaskedBits(Op1, TgtMask, RKZ, RKO);
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// FIXME: rotrwi / rotlwi
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if ((LKZ | RKZ) == 0x00000000FFFFFFFFULL) {
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unsigned PInsMask = ~RKZ;
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unsigned PTgtMask = ~LKZ;
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@ -85,75 +85,6 @@ more than one use. Itanium will want this too.
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===-------------------------------------------------------------------------===
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#define ARRAY_LENGTH 16
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union bitfield {
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struct {
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#ifndef __ppc__
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unsigned int field0 : 6;
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unsigned int field1 : 6;
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unsigned int field2 : 6;
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unsigned int field3 : 6;
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unsigned int field4 : 3;
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unsigned int field5 : 4;
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unsigned int field6 : 1;
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#else
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unsigned int field6 : 1;
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unsigned int field5 : 4;
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unsigned int field4 : 3;
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unsigned int field3 : 6;
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unsigned int field2 : 6;
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unsigned int field1 : 6;
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unsigned int field0 : 6;
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#endif
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} bitfields, bits;
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unsigned int u32All;
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signed int i32All;
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float f32All;
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};
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typedef struct program_t {
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union bitfield array[ARRAY_LENGTH];
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int size;
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int loaded;
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} program;
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void AdjustBitfields(program* prog, unsigned int fmt1)
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{
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prog->array[0].bitfields.field0 = fmt1;
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prog->array[0].bitfields.field1 = fmt1 + 1;
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}
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We currently generate:
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_AdjustBitfields:
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lwz r2, 0(r3)
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addi r5, r4, 1
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rlwinm r2, r2, 0, 0, 19
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rlwinm r5, r5, 6, 20, 25
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rlwimi r2, r4, 0, 26, 31
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or r2, r2, r5
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stw r2, 0(r3)
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blr
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We should teach someone that or (rlwimi, rlwinm) with disjoint masks can be
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turned into rlwimi (rlwimi)
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The better codegen would be:
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_AdjustBitfields:
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lwz r0,0(r3)
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rlwinm r4,r4,0,0xff
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rlwimi r0,r4,0,26,31
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addi r4,r4,1
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rlwimi r0,r4,6,20,25
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stw r0,0(r3)
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blr
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===-------------------------------------------------------------------------===
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Compile this:
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int %f1(int %a, int %b) {
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