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Have legalize take care of DYNAMIC_STACKALLOC for us, implement llvm.stacksave/stackrestore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25332 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -136,8 +136,6 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
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setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
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setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
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setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom);
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// V8 has no intrinsics for these particular operations.
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setOperationAction(ISD::MEMMOVE, MVT::Other, Expand);
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setOperationAction(ISD::MEMSET, MVT::Other, Expand);
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@ -163,9 +161,12 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
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setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
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setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
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// Not implemented yet.
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// Expand these to their default code.
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setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
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setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
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setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
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setStackPointerRegisterToSaveRestore(V8::O6);
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computeRegisterProperties();
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}
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@ -701,21 +702,6 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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return DAG.getNode(Opc, TrueVal.getValueType(), TrueVal, FalseVal,
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DAG.getConstant(CC, MVT::i32), CompareFlag);
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}
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case ISD::DYNAMIC_STACKALLOC: {
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SDOperand Chain = Op.getOperand(0);
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SDOperand Size = Op.getOperand(1);
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SDOperand SP = DAG.getCopyFromReg(Chain, V8::O6, MVT::i32);
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Chain = SP.getValue(1);
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SDOperand Res = DAG.getNode(ISD::SUB, MVT::i32, SP, Size);
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Chain = DAG.getCopyToReg(Chain, V8::O6, Res);
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std::vector<MVT::ValueType> VTs(Op.Val->value_begin(), Op.Val->value_end());
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std::vector<SDOperand> Ops;
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Ops.push_back(Res);
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Ops.push_back(Chain);
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return DAG.getNode(ISD::MERGE_VALUES, VTs, Ops);
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}
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}
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}
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@ -136,8 +136,6 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
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setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
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setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
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setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom);
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// V8 has no intrinsics for these particular operations.
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setOperationAction(ISD::MEMMOVE, MVT::Other, Expand);
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setOperationAction(ISD::MEMSET, MVT::Other, Expand);
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@ -163,9 +161,12 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
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setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
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setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
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// Not implemented yet.
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// Expand these to their default code.
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setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
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setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
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setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
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setStackPointerRegisterToSaveRestore(V8::O6);
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computeRegisterProperties();
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}
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@ -701,21 +702,6 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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return DAG.getNode(Opc, TrueVal.getValueType(), TrueVal, FalseVal,
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DAG.getConstant(CC, MVT::i32), CompareFlag);
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}
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case ISD::DYNAMIC_STACKALLOC: {
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SDOperand Chain = Op.getOperand(0);
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SDOperand Size = Op.getOperand(1);
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SDOperand SP = DAG.getCopyFromReg(Chain, V8::O6, MVT::i32);
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Chain = SP.getValue(1);
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SDOperand Res = DAG.getNode(ISD::SUB, MVT::i32, SP, Size);
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Chain = DAG.getCopyToReg(Chain, V8::O6, Res);
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std::vector<MVT::ValueType> VTs(Op.Val->value_begin(), Op.Val->value_end());
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std::vector<SDOperand> Ops;
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Ops.push_back(Res);
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Ops.push_back(Chain);
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return DAG.getNode(ISD::MERGE_VALUES, VTs, Ops);
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}
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}
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}
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