From 936986d12d0c8abbd5afdb2ac8b38c1cf02c9191 Mon Sep 17 00:00:00 2001 From: Colin LeMahieu Date: Tue, 3 Feb 2015 18:16:28 +0000 Subject: [PATCH] [Hexagon] Converting complex number intrinsics and adding tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227995 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Hexagon/HexagonIntrinsics.td | 157 ++++---- lib/Target/Hexagon/HexagonIntrinsicsV4.td | 28 ++ .../Hexagon/intrinsics/xtype_complex.ll | 349 ++++++++++++++++++ 3 files changed, 439 insertions(+), 95 deletions(-) create mode 100644 test/CodeGen/Hexagon/intrinsics/xtype_complex.ll diff --git a/lib/Target/Hexagon/HexagonIntrinsics.td b/lib/Target/Hexagon/HexagonIntrinsics.td index ec2b5dba48f..419c21e309f 100644 --- a/lib/Target/Hexagon/HexagonIntrinsics.td +++ b/lib/Target/Hexagon/HexagonIntrinsics.td @@ -337,6 +337,35 @@ def : T_PRR_pat ; def : T_PRR_pat ; def : T_PRR_pat ; +// Vector complex multiply imaginary: Rdd=vcmpyi(Rss,Rtt)[:<<1]:sat +def : T_PP_pat ; +def : T_PP_pat ; + +// Vector complex multiply real: Rdd=vcmpyr(Rss,Rtt)[:<<1]:sat +def : T_PP_pat ; +def : T_PP_pat ; + +// Vector reduce complex multiply real or imaginary: +// Rdd[+]=vrcmpy[ir](Rss,Rtt[*]) +def : T_PP_pat ; +def : T_PP_pat ; +def : T_PPP_pat ; +def : T_PPP_pat ; + +def : T_PP_pat ; +def : T_PP_pat ; +def : T_PPP_pat ; +def : T_PPP_pat ; + +// Vector reduce halfwords +// Rdd[+]=vrmpyh(Rss,Rtt) +def : T_PP_pat ; +def : T_PPP_pat ; + +// Vector complex multiply real or imaginary with accumulation +// Rxx+=vcmpy[ir](Rss,Rtt):sat +def : T_PPP_pat ; +def : T_PPP_pat ; //===----------------------------------------------------------------------===// // Add/Subtract halfword @@ -745,12 +774,38 @@ def : Pat<(int_hexagon_C2_vmux PredRegs:$Pu, DoubleRegs:$Rs, DoubleRegs:$Rt), def : T_RR_pat ; def : T_RR_pat ; +// Complex multiply real or imaginary +def : T_RR_pat ; +def : T_RR_pat ; + +// Complex multiply +def : T_RR_pat ; +def : T_RR_pat ; +def : T_RR_pat ; +def : T_RR_pat ; + // Rxx[+-]= mpy[u](Rs,Rt) def : T_PRR_pat ; def : T_PRR_pat ; def : T_PRR_pat ; def : T_PRR_pat ; +// Rxx[-+]=cmpy(Rs,Rt)[:<<1]:sat +def : T_PRR_pat ; +def : T_PRR_pat ; +def : T_PRR_pat ; +def : T_PRR_pat ; + +// Rxx[-+]=cmpy(Rs,Rt*)[:<<1]:sat +def : T_PRR_pat ; +def : T_PRR_pat ; +def : T_PRR_pat ; +def : T_PRR_pat ; + +// Rxx+=cmpy[ir](Rs,Rt) +def : T_PRR_pat ; +def : T_PRR_pat ; + /******************************************************************** * CR * *********************************************************************/ @@ -807,6 +862,13 @@ def : MType_R32_pat ; def : MType_R32_pat ; def : MType_R32_pat ; +// Complex multiply with round and pack +// Rxx32+=cmpy(Rs32,[*]Rt32:<<1]:rnd:sat +def : MType_R32_pat ; +def : MType_R32_pat ; +def : MType_R32_pat ; +def : MType_R32_pat ; + /******************************************************************** * STYPE/ALU * *********************************************************************/ @@ -1503,101 +1565,6 @@ def HEXAGON_M2_vabsdiffh: def HEXAGON_M2_vabsdiffw: di_MInst_didi <"vabsdiffw",int_hexagon_M2_vabsdiffw>; - -/******************************************************************** -* MTYPE/COMPLEX * -*********************************************************************/ - -// MTYPE / COMPLEX / Complex multiply. -// Rdd[-+]=cmpy(Rs, Rt:<<1]:sat -def HEXAGON_M2_cmpys_s1: - di_MInst_sisi_s1_sat <"cmpy", int_hexagon_M2_cmpys_s1>; -def HEXAGON_M2_cmpys_s0: - di_MInst_sisi_sat <"cmpy", int_hexagon_M2_cmpys_s0>; -def HEXAGON_M2_cmpysc_s1: - di_MInst_sisi_s1_sat_conj <"cmpy", int_hexagon_M2_cmpysc_s1>; -def HEXAGON_M2_cmpysc_s0: - di_MInst_sisi_sat_conj <"cmpy", int_hexagon_M2_cmpysc_s0>; - -def HEXAGON_M2_cmacs_s1: - di_MInst_disisi_acc_s1_sat <"cmpy", int_hexagon_M2_cmacs_s1>; -def HEXAGON_M2_cmacs_s0: - di_MInst_disisi_acc_sat <"cmpy", int_hexagon_M2_cmacs_s0>; -def HEXAGON_M2_cmacsc_s1: - di_MInst_disisi_acc_s1_sat_conj <"cmpy", int_hexagon_M2_cmacsc_s1>; -def HEXAGON_M2_cmacsc_s0: - di_MInst_disisi_acc_sat_conj <"cmpy", int_hexagon_M2_cmacsc_s0>; - -def HEXAGON_M2_cnacs_s1: - di_MInst_disisi_nac_s1_sat <"cmpy", int_hexagon_M2_cnacs_s1>; -def HEXAGON_M2_cnacs_s0: - di_MInst_disisi_nac_sat <"cmpy", int_hexagon_M2_cnacs_s0>; -def HEXAGON_M2_cnacsc_s1: - di_MInst_disisi_nac_s1_sat_conj <"cmpy", int_hexagon_M2_cnacsc_s1>; -def HEXAGON_M2_cnacsc_s0: - di_MInst_disisi_nac_sat_conj <"cmpy", int_hexagon_M2_cnacsc_s0>; - -// MTYPE / COMPLEX / Complex multiply real or imaginary. -def HEXAGON_M2_cmpyr_s0: - di_MInst_sisi <"cmpyr", int_hexagon_M2_cmpyr_s0>; -def HEXAGON_M2_cmacr_s0: - di_MInst_disisi_acc <"cmpyr", int_hexagon_M2_cmacr_s0>; - -def HEXAGON_M2_cmpyi_s0: - di_MInst_sisi <"cmpyi", int_hexagon_M2_cmpyi_s0>; -def HEXAGON_M2_cmaci_s0: - di_MInst_disisi_acc <"cmpyi", int_hexagon_M2_cmaci_s0>; - -// MTYPE / COMPLEX / Complex multiply with round and pack. -// Rxx32+=cmpy(Rs32,[*]Rt32:<<1]:rnd:sat -def HEXAGON_M2_cmpyrs_s0: - si_MInst_sisi_rnd_sat <"cmpy", int_hexagon_M2_cmpyrs_s0>; -def HEXAGON_M2_cmpyrs_s1: - si_MInst_sisi_s1_rnd_sat <"cmpy", int_hexagon_M2_cmpyrs_s1>; - -def HEXAGON_M2_cmpyrsc_s0: - si_MInst_sisi_rnd_sat_conj <"cmpy", int_hexagon_M2_cmpyrsc_s0>; -def HEXAGON_M2_cmpyrsc_s1: - si_MInst_sisi_s1_rnd_sat_conj <"cmpy", int_hexagon_M2_cmpyrsc_s1>; - -//MTYPE / COMPLEX / Vector complex multiply real or imaginary. -def HEXAGON_M2_vcmpy_s0_sat_i: - di_MInst_didi_sat <"vcmpyi", int_hexagon_M2_vcmpy_s0_sat_i>; -def HEXAGON_M2_vcmpy_s1_sat_i: - di_MInst_didi_s1_sat <"vcmpyi", int_hexagon_M2_vcmpy_s1_sat_i>; - -def HEXAGON_M2_vcmpy_s0_sat_r: - di_MInst_didi_sat <"vcmpyr", int_hexagon_M2_vcmpy_s0_sat_r>; -def HEXAGON_M2_vcmpy_s1_sat_r: - di_MInst_didi_s1_sat <"vcmpyr", int_hexagon_M2_vcmpy_s1_sat_r>; - -def HEXAGON_M2_vcmac_s0_sat_i: - di_MInst_dididi_acc_sat <"vcmpyi", int_hexagon_M2_vcmac_s0_sat_i>; -def HEXAGON_M2_vcmac_s0_sat_r: - di_MInst_dididi_acc_sat <"vcmpyr", int_hexagon_M2_vcmac_s0_sat_r>; - -//MTYPE / COMPLEX / Vector reduce complex multiply real or imaginary. -def HEXAGON_M2_vrcmpyi_s0: - di_MInst_didi <"vrcmpyi", int_hexagon_M2_vrcmpyi_s0>; -def HEXAGON_M2_vrcmpyr_s0: - di_MInst_didi <"vrcmpyr", int_hexagon_M2_vrcmpyr_s0>; - -def HEXAGON_M2_vrcmpyi_s0c: - di_MInst_didi_conj <"vrcmpyi", int_hexagon_M2_vrcmpyi_s0c>; -def HEXAGON_M2_vrcmpyr_s0c: - di_MInst_didi_conj <"vrcmpyr", int_hexagon_M2_vrcmpyr_s0c>; - -def HEXAGON_M2_vrcmaci_s0: - di_MInst_dididi_acc <"vrcmpyi", int_hexagon_M2_vrcmaci_s0>; -def HEXAGON_M2_vrcmacr_s0: - di_MInst_dididi_acc <"vrcmpyr", int_hexagon_M2_vrcmacr_s0>; - -def HEXAGON_M2_vrcmaci_s0c: - di_MInst_dididi_acc_conj <"vrcmpyi", int_hexagon_M2_vrcmaci_s0c>; -def HEXAGON_M2_vrcmacr_s0c: - di_MInst_dididi_acc_conj <"vrcmpyr", int_hexagon_M2_vrcmacr_s0c>; - - /******************************************************************** * MTYPE/MPYH * *********************************************************************/ diff --git a/lib/Target/Hexagon/HexagonIntrinsicsV4.td b/lib/Target/Hexagon/HexagonIntrinsicsV4.td index ae2d463fa68..f93d0e8c540 100644 --- a/lib/Target/Hexagon/HexagonIntrinsicsV4.td +++ b/lib/Target/Hexagon/HexagonIntrinsicsV4.td @@ -77,9 +77,25 @@ def : T_RRI_pat ; def : T_RRR_pat ; def : T_RRR_pat ; +// Complex multiply 32x16 +def : T_PR_pat ; +def : T_PR_pat ; + +def : T_PR_pat ; +def : T_PR_pat ; + def : T_PP_pat; def : T_PP_pat; +// Complex add/sub halfwords/words +def : T_PP_pat ; +def : T_PP_pat ; +def : T_PP_pat ; +def : T_PP_pat ; + +def : T_PP_pat ; +def : T_PP_pat ; + // Extract bitfield def : T_PP_pat ; def : T_RP_pat ; @@ -109,6 +125,18 @@ def : T_PPR_pat ; def : T_PPR_pat ; def : T_PPR_pat ; +// Rotate and reduce bytes +def : Pat <(int_hexagon_S4_vrcrotate DoubleRegs:$src1, IntRegs:$src2, + u2ImmPred:$src3), + (S4_vrcrotate DoubleRegs:$src1, IntRegs:$src2, u2ImmPred:$src3)>; + +// Rotate and reduce bytes with accumulation +// Rxx+=vrcrotate(Rss,Rt,#u2) +def : Pat <(int_hexagon_S4_vrcrotate_acc DoubleRegs:$src1, DoubleRegs:$src2, + IntRegs:$src3, u2ImmPred:$src4), + (S4_vrcrotate_acc DoubleRegs:$src1, DoubleRegs:$src2, + IntRegs:$src3, u2ImmPred:$src4)>; + // Vector conditional negate def : T_PPR_pat; diff --git a/test/CodeGen/Hexagon/intrinsics/xtype_complex.ll b/test/CodeGen/Hexagon/intrinsics/xtype_complex.ll new file mode 100644 index 00000000000..57b0c5b6db5 --- /dev/null +++ b/test/CodeGen/Hexagon/intrinsics/xtype_complex.ll @@ -0,0 +1,349 @@ +; RUN: llc -march=hexagon -O0 < %s | FileCheck %s +; Hexagon Programmer's Reference Manual 11.10.3 XTYPE/COMPLEX + +; Complex add/sub halfwords +declare i64 @llvm.hexagon.S4.vxaddsubh(i64, i64) +define i64 @S4_vxaddsubh(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.S4.vxaddsubh(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vxaddsubh(r1:0, r3:2):sat + +declare i64 @llvm.hexagon.S4.vxsubaddh(i64, i64) +define i64 @S4_vxsubaddh(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.S4.vxsubaddh(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vxsubaddh(r1:0, r3:2):sat + +declare i64 @llvm.hexagon.S4.vxaddsubhr(i64, i64) +define i64 @S4_vxaddsubhr(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.S4.vxaddsubhr(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vxaddsubh(r1:0, r3:2):rnd:>>1:sat + +declare i64 @llvm.hexagon.S4.vxsubaddhr(i64, i64) +define i64 @S4_vxsubaddhr(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.S4.vxsubaddhr(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vxsubaddh(r1:0, r3:2):rnd:>>1:sat + +; Complex add/sub words +declare i64 @llvm.hexagon.S4.vxaddsubw(i64, i64) +define i64 @S4_vxaddsubw(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.S4.vxaddsubw(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vxaddsubw(r1:0, r3:2):sat + +declare i64 @llvm.hexagon.S4.vxsubaddw(i64, i64) +define i64 @S4_vxsubaddw(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.S4.vxsubaddw(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vxsubaddw(r1:0, r3:2):sat + +; Complex multiply +declare i64 @llvm.hexagon.M2.cmpys.s0(i32, i32) +define i64 @M2_cmpys_s0(i32 %a, i32 %b) { + %z = call i64 @llvm.hexagon.M2.cmpys.s0(i32 %a, i32 %b) + ret i64 %z +} +; CHECK: r1:0 = cmpy(r0, r1):sat + +declare i64 @llvm.hexagon.M2.cmpys.s1(i32, i32) +define i64 @M2_cmpys_s1(i32 %a, i32 %b) { + %z = call i64 @llvm.hexagon.M2.cmpys.s1(i32 %a, i32 %b) + ret i64 %z +} +; CHECK: r1:0 = cmpy(r0, r1):<<1:sat + +declare i64 @llvm.hexagon.M2.cmpysc.s0(i32, i32) +define i64 @M2_cmpysc_s0(i32 %a, i32 %b) { + %z = call i64 @llvm.hexagon.M2.cmpysc.s0(i32 %a, i32 %b) + ret i64 %z +} +; CHECK: r1:0 = cmpy(r0, r1*):sat + +declare i64 @llvm.hexagon.M2.cmpysc.s1(i32, i32) +define i64 @M2_cmpysc_s1(i32 %a, i32 %b) { + %z = call i64 @llvm.hexagon.M2.cmpysc.s1(i32 %a, i32 %b) + ret i64 %z +} +; CHECK: r1:0 = cmpy(r0, r1*):<<1:sat + +declare i64 @llvm.hexagon.M2.cmacs.s0(i64, i32, i32) +define i64 @M2_cmacs_s0(i64 %a, i32 %b, i32 %c) { + %z = call i64 @llvm.hexagon.M2.cmacs.s0(i64 %a, i32 %b, i32 %c) + ret i64 %z +} +; CHECK: r1:0 += cmpy(r2, r3):sat + +declare i64 @llvm.hexagon.M2.cmacs.s1(i64, i32, i32) +define i64 @M2_cmacs_s1(i64 %a, i32 %b, i32 %c) { + %z = call i64 @llvm.hexagon.M2.cmacs.s1(i64 %a, i32 %b, i32 %c) + ret i64 %z +} +; CHECK: r1:0 += cmpy(r2, r3):<<1:sat + +declare i64 @llvm.hexagon.M2.cnacs.s0(i64, i32, i32) +define i64 @M2_cnacs_s0(i64 %a, i32 %b, i32 %c) { + %z = call i64 @llvm.hexagon.M2.cnacs.s0(i64 %a, i32 %b, i32 %c) + ret i64 %z +} +; CHECK: r1:0 -= cmpy(r2, r3):sat + +declare i64 @llvm.hexagon.M2.cnacs.s1(i64, i32, i32) +define i64 @M2_cnacs_s1(i64 %a, i32 %b, i32 %c) { + %z = call i64 @llvm.hexagon.M2.cnacs.s1(i64 %a, i32 %b, i32 %c) + ret i64 %z +} +; CHECK: r1:0 -= cmpy(r2, r3):<<1:sat + +declare i64 @llvm.hexagon.M2.cmacsc.s0(i64, i32, i32) +define i64 @M2_cmacsc_s0(i64 %a, i32 %b, i32 %c) { + %z = call i64 @llvm.hexagon.M2.cmacsc.s0(i64 %a, i32 %b, i32 %c) + ret i64 %z +} +; CHECK: r1:0 += cmpy(r2, r3*):sat + +declare i64 @llvm.hexagon.M2.cmacsc.s1(i64, i32, i32) +define i64 @M2_cmacsc_s1(i64 %a, i32 %b, i32 %c) { + %z = call i64 @llvm.hexagon.M2.cmacsc.s1(i64 %a, i32 %b, i32 %c) + ret i64 %z +} +; CHECK: r1:0 += cmpy(r2, r3*):<<1:sat + +declare i64 @llvm.hexagon.M2.cnacsc.s0(i64, i32, i32) +define i64 @M2_cnacsc_s0(i64 %a, i32 %b, i32 %c) { + %z = call i64 @llvm.hexagon.M2.cnacsc.s0(i64 %a, i32 %b, i32 %c) + ret i64 %z +} +; CHECK: r1:0 -= cmpy(r2, r3*):sat + +declare i64 @llvm.hexagon.M2.cnacsc.s1(i64, i32, i32) +define i64 @M2_cnacsc_s1(i64 %a, i32 %b, i32 %c) { + %z = call i64 @llvm.hexagon.M2.cnacsc.s1(i64 %a, i32 %b, i32 %c) + ret i64 %z +} +; CHECK: r1:0 -= cmpy(r2, r3*):<<1:sat + +; Complex multiply real or imaginary +declare i64 @llvm.hexagon.M2.cmpyi.s0(i32, i32) +define i64 @M2_cmpyi_s0(i32 %a, i32 %b) { + %z = call i64 @llvm.hexagon.M2.cmpyi.s0(i32 %a, i32 %b) + ret i64 %z +} +; CHECK: r1:0 = cmpyi(r0, r1) + +declare i64 @llvm.hexagon.M2.cmpyr.s0(i32, i32) +define i64 @M2_cmpyr_s0(i32 %a, i32 %b) { + %z = call i64 @llvm.hexagon.M2.cmpyr.s0(i32 %a, i32 %b) + ret i64 %z +} +; CHECK: r1:0 = cmpyr(r0, r1) + +declare i64 @llvm.hexagon.M2.cmaci.s0(i64, i32, i32) +define i64 @M2_cmaci_s0(i64 %a, i32 %b, i32 %c) { + %z = call i64 @llvm.hexagon.M2.cmaci.s0(i64 %a, i32 %b, i32 %c) + ret i64 %z +} +; CHECK: r1:0 += cmpyi(r2, r3) + +declare i64 @llvm.hexagon.M2.cmacr.s0(i64, i32, i32) +define i64 @M2_cmacr_s0(i64 %a, i32 %b, i32 %c) { + %z = call i64 @llvm.hexagon.M2.cmacr.s0(i64 %a, i32 %b, i32 %c) + ret i64 %z +} +; CHECK: r1:0 += cmpyr(r2, r3) + +; Complex multiply with round and pack +declare i32 @llvm.hexagon.M2.cmpyrs.s0(i32, i32) +define i32 @M2_cmpyrs_s0(i32 %a, i32 %b) { + %z = call i32 @llvm.hexagon.M2.cmpyrs.s0(i32 %a, i32 %b) + ret i32 %z +} +; CHECK: r0 = cmpy(r0, r1):rnd:sat + +declare i32 @llvm.hexagon.M2.cmpyrs.s1(i32, i32) +define i32 @M2_cmpyrs_s1(i32 %a, i32 %b) { + %z = call i32 @llvm.hexagon.M2.cmpyrs.s1(i32 %a, i32 %b) + ret i32 %z +} +; CHECK: r0 = cmpy(r0, r1):<<1:rnd:sat + +declare i32 @llvm.hexagon.M2.cmpyrsc.s0(i32, i32) +define i32 @M2_cmpyrsc_s0(i32 %a, i32 %b) { + %z = call i32 @llvm.hexagon.M2.cmpyrsc.s0(i32 %a, i32 %b) + ret i32 %z +} +; CHECK: r0 = cmpy(r0, r1*):rnd:sat + +declare i32 @llvm.hexagon.M2.cmpyrsc.s1(i32, i32) +define i32 @M2_cmpyrsc_s1(i32 %a, i32 %b) { + %z = call i32 @llvm.hexagon.M2.cmpyrsc.s1(i32 %a, i32 %b) + ret i32 %z +} +; CHECK: r0 = cmpy(r0, r1*):<<1:rnd:sat + +; Complex multiply 32x16 +declare i32 @llvm.hexagon.M4.cmpyi.wh(i64, i32) +define i32 @M4_cmpyi_wh(i64 %a, i32 %b) { + %z = call i32 @llvm.hexagon.M4.cmpyi.wh(i64 %a, i32 %b) + ret i32 %z +} +; CHECK: r0 = cmpyiwh(r1:0, r2):<<1:rnd:sat + +declare i32 @llvm.hexagon.M4.cmpyi.whc(i64, i32) +define i32 @M4_cmpyi_whc(i64 %a, i32 %b) { + %z = call i32 @llvm.hexagon.M4.cmpyi.whc(i64 %a, i32 %b) + ret i32 %z +} +; CHECK: r0 = cmpyiwh(r1:0, r2*):<<1:rnd:sat + +declare i32 @llvm.hexagon.M4.cmpyr.wh(i64, i32) +define i32 @M4_cmpyr_wh(i64 %a, i32 %b) { + %z = call i32 @llvm.hexagon.M4.cmpyr.wh(i64 %a, i32 %b) + ret i32 %z +} +; CHECK: r0 = cmpyrwh(r1:0, r2):<<1:rnd:sat + +declare i32 @llvm.hexagon.M4.cmpyr.whc(i64, i32) +define i32 @M4_cmpyr_whc(i64 %a, i32 %b) { + %z = call i32 @llvm.hexagon.M4.cmpyr.whc(i64 %a, i32 %b) + ret i32 %z +} +; CHECK: r0 = cmpyrwh(r1:0, r2*):<<1:rnd:sat + +; Vector complex multiply real or imaginary +declare i64 @llvm.hexagon.M2.vcmpy.s0.sat.r(i64, i64) +define i64 @M2_vcmpy_s0_sat_r(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.M2.vcmpy.s0.sat.r(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vcmpyr(r1:0, r3:2):sat + +declare i64 @llvm.hexagon.M2.vcmpy.s1.sat.r(i64, i64) +define i64 @M2_vcmpy_s1_sat_r(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.M2.vcmpy.s1.sat.r(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vcmpyr(r1:0, r3:2):<<1:sat + +declare i64 @llvm.hexagon.M2.vcmpy.s0.sat.i(i64, i64) +define i64 @M2_vcmpy_s0_sat_i(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.M2.vcmpy.s0.sat.i(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vcmpyi(r1:0, r3:2):sat + +declare i64 @llvm.hexagon.M2.vcmpy.s1.sat.i(i64, i64) +define i64 @M2_vcmpy_s1_sat_i(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.M2.vcmpy.s1.sat.i(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vcmpyi(r1:0, r3:2):<<1:sat + +declare i64 @llvm.hexagon.M2.vcmac.s0.sat.r(i64, i64, i64) +define i64 @M2_vcmac_s0_sat_r(i64 %a, i64 %b, i64 %c) { + %z = call i64 @llvm.hexagon.M2.vcmac.s0.sat.r(i64 %a, i64 %b, i64 %c) + ret i64 %z +} +; CHECK: r1:0 += vcmpyr(r3:2, r5:4):sat + +declare i64 @llvm.hexagon.M2.vcmac.s0.sat.i(i64, i64, i64) +define i64 @M2_vcmac_s0_sat_i(i64 %a, i64 %b, i64 %c) { + %z = call i64 @llvm.hexagon.M2.vcmac.s0.sat.i(i64 %a, i64 %b, i64 %c) + ret i64 %z +} +; CHECK: r1:0 += vcmpyi(r3:2, r5:4):sat + +; Vector complex conjugate +declare i64 @llvm.hexagon.A2.vconj(i64) +define i64 @A2_vconj(i64 %a) { + %z = call i64 @llvm.hexagon.A2.vconj(i64 %a) + ret i64 %z +} +; CHECK: r1:0 = vconj(r1:0):sat + +; Vector complex rotate +declare i64 @llvm.hexagon.S2.vcrotate(i64, i32) +define i64 @S2_vcrotate(i64 %a, i32 %b) { + %z = call i64 @llvm.hexagon.S2.vcrotate(i64 %a, i32 %b) + ret i64 %z +} +; CHECK: r1:0 = vcrotate(r1:0, r2) + +; Vector reduce complex multiply real or imaginary +declare i64 @llvm.hexagon.M2.vrcmpyi.s0(i64, i64) +define i64 @M2_vrcmpyi_s0(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.M2.vrcmpyi.s0(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vrcmpyi(r1:0, r3:2) + +declare i64 @llvm.hexagon.M2.vrcmpyr.s0(i64, i64) +define i64 @M2_vrcmpyr_s0(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.M2.vrcmpyr.s0(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vrcmpyr(r1:0, r3:2) + +declare i64 @llvm.hexagon.M2.vrcmpyi.s0c(i64, i64) +define i64 @M2_vrcmpyi_s0c(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.M2.vrcmpyi.s0c(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vrcmpyi(r1:0, r3:2*) + +declare i64 @llvm.hexagon.M2.vrcmpyr.s0c(i64, i64) +define i64 @M2_vrcmpyr_s0c(i64 %a, i64 %b) { + %z = call i64 @llvm.hexagon.M2.vrcmpyr.s0c(i64 %a, i64 %b) + ret i64 %z +} +; CHECK: r1:0 = vrcmpyr(r1:0, r3:2*) + +declare i64 @llvm.hexagon.M2.vrcmaci.s0(i64, i64, i64) +define i64 @M2_vrcmaci_s0(i64 %a, i64 %b, i64 %c) { + %z = call i64 @llvm.hexagon.M2.vrcmaci.s0(i64 %a, i64 %b, i64 %c) + ret i64 %z +} +; CHECK: r1:0 += vrcmpyi(r3:2, r5:4) + +declare i64 @llvm.hexagon.M2.vrcmacr.s0(i64, i64, i64) +define i64 @M2_vrcmacr_s0(i64 %a, i64 %b, i64 %c) { + %z = call i64 @llvm.hexagon.M2.vrcmacr.s0(i64 %a, i64 %b, i64 %c) + ret i64 %z +} +; CHECK: r1:0 += vrcmpyr(r3:2, r5:4) + +declare i64 @llvm.hexagon.M2.vrcmaci.s0c(i64, i64, i64) +define i64 @M2_vrcmaci_s0c(i64 %a, i64 %b, i64 %c) { + %z = call i64 @llvm.hexagon.M2.vrcmaci.s0c(i64 %a, i64 %b, i64 %c) + ret i64 %z +} +; CHECK: r1:0 += vrcmpyi(r3:2, r5:4*) + +declare i64 @llvm.hexagon.M2.vrcmacr.s0c(i64, i64, i64) +define i64 @M2_vrcmacr_s0c(i64 %a, i64 %b, i64 %c) { + %z = call i64 @llvm.hexagon.M2.vrcmacr.s0c(i64 %a, i64 %b, i64 %c) + ret i64 %z +} +; CHECK: r1:0 += vrcmpyr(r3:2, r5:4*) + +; Vector reduce complex rotate +declare i64 @llvm.hexagon.S4.vrcrotate(i64, i32, i32) +define i64 @S4_vrcrotate(i64 %a, i32 %b) { + %z = call i64 @llvm.hexagon.S4.vrcrotate(i64 %a, i32 %b, i32 0) + ret i64 %z +} +; CHECK: r1:0 = vrcrotate(r1:0, r2, #0) + +declare i64 @llvm.hexagon.S4.vrcrotate.acc(i64, i64, i32, i32) +define i64 @S4_vrcrotate_acc(i64 %a, i64 %b, i32 %c) { + %z = call i64 @llvm.hexagon.S4.vrcrotate.acc(i64 %a, i64 %b, i32 %c, i32 0) + ret i64 %z +} +; CHECK: r1:0 += vrcrotate(r3:2, r4, #0)