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Add a static MachineOperand::clobbersPhysReg().

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It can be necessary to detach a register mask pointer from its
MachineOperand. This method is convenient for checking clobbered
physregs on a detached bitmask pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150261 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2012-02-10 19:23:53 +00:00
parent 6ef7da0197
commit 938200859e
2 changed files with 14 additions and 11 deletions
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16
include/llvm/CodeGen/MachineOperand.h
View File

@@ -441,12 +441,20 @@ public:
return Contents.OffsetedInfo.Val.SymbolName; return Contents.OffsetedInfo.Val.SymbolName;
} }
/// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg. /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
bool clobbersPhysReg(unsigned PhysReg) const { /// It is sometimes necessary to detach the register mask pointer from its
assert(isRegMask() && "Wrong MachineOperand accessor"); /// machine operand. This static method can be used for such detached bit
/// mask pointers. clobbersPhysReg - Returns true if this RegMask operand
/// clobbers PhysReg.
static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
// See TargetRegisterInfo.h. // See TargetRegisterInfo.h.
assert(PhysReg < (1u << 30) && "Not a physical register"); assert(PhysReg < (1u << 30) && "Not a physical register");
return !(Contents.RegMask[PhysReg / 32] & (1u << PhysReg % 32)); return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
}
/// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
bool clobbersPhysReg(unsigned PhysReg) const {
return clobbersPhysReg(getRegMask(), PhysReg);
} }
/// getRegMask - Returns a bit mask of registers preserved by this RegMask /// getRegMask - Returns a bit mask of registers preserved by this RegMask

9
lib/CodeGen/InterferenceCache.cpp
View File

@@ -106,11 +106,6 @@ bool InterferenceCache::Entry::valid(LiveIntervalUnion *LIUArray,
return i == e; return i == e;
} }
// Test if a register mask clobbers PhysReg.
static inline bool maskClobber(const uint32_t *Mask, unsigned PhysReg) {
return !(Mask[PhysReg/32] & (1u << PhysReg%32));
}
void InterferenceCache::Entry::update(unsigned MBBNum) { void InterferenceCache::Entry::update(unsigned MBBNum) {
SlotIndex Start, Stop; SlotIndex Start, Stop;
tie(Start, Stop) = Indexes->getMBBRange(MBBNum); tie(Start, Stop) = Indexes->getMBBRange(MBBNum);
@@ -152,7 +147,7 @@ void InterferenceCache::Entry::update(unsigned MBBNum) {
SlotIndex Limit = BI->First.isValid() ? BI->First : Stop; SlotIndex Limit = BI->First.isValid() ? BI->First : Stop;
for (unsigned i = 0, e = RegMaskSlots.size(); for (unsigned i = 0, e = RegMaskSlots.size();
i != e && RegMaskSlots[i] < Limit; ++i) i != e && RegMaskSlots[i] < Limit; ++i)
if (maskClobber(RegMaskBits[i], PhysReg)) { if (MachineOperand::clobbersPhysReg(RegMaskBits[i], PhysReg)) {
// Register mask i clobbers PhysReg before the LIU interference. // Register mask i clobbers PhysReg before the LIU interference.
BI->First = RegMaskSlots[i]; BI->First = RegMaskSlots[i];
break; break;
@@ -191,7 +186,7 @@ void InterferenceCache::Entry::update(unsigned MBBNum) {
// Also check for register mask interference. // Also check for register mask interference.
SlotIndex Limit = BI->Last.isValid() ? BI->Last : Start; SlotIndex Limit = BI->Last.isValid() ? BI->Last : Start;
for (unsigned i = RegMaskSlots.size(); i && RegMaskSlots[i-1] > Limit; --i) for (unsigned i = RegMaskSlots.size(); i && RegMaskSlots[i-1] > Limit; --i)
if (maskClobber(RegMaskBits[i-1], PhysReg)) { if (MachineOperand::clobbersPhysReg(RegMaskBits[i-1], PhysReg)) {
// Register mask i-1 clobbers PhysReg after the LIU interference. // Register mask i-1 clobbers PhysReg after the LIU interference.
// Model the regmask clobber as a dead def. // Model the regmask clobber as a dead def.
BI->Last = RegMaskSlots[i-1].getDeadSlot(); BI->Last = RegMaskSlots[i-1].getDeadSlot();