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Simplify the AND-rooted mask+shift checking code to match that of the

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SRL-rooted code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147941 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chandler Carruth 2012-01-11 09:35:04 +00:00
parent dddcd78e24
commit 93b7358fc9
1 changed files with 6 additions and 8 deletions
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14
lib/Target/X86/X86ISelDAGToDAG.cpp
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@ -1255,23 +1255,21 @@ bool X86DAGToDAGISel::MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
// addressing mode optimizations.
if (X.getValueSizeInBits() > 64) break;
ConstantSDNode *C2 = dyn_cast<ConstantSDNode>(N.getOperand(1));
ConstantSDNode *C1 = dyn_cast<ConstantSDNode>(Shift.getOperand(1));
if (!C1 || !C2) break;
if (!isa<ConstantSDNode>(N.getOperand(1)))
break;
uint64_t Mask = N.getConstantOperandVal(1);
// Try to fold the mask and shift into an extract and scale.
if (!FoldMaskAndShiftToExtract(*CurDAG, N, C2->getZExtValue(),
Shift, X, AM))
if (!FoldMaskAndShiftToExtract(*CurDAG, N, Mask, Shift, X, AM))
return false;
// Try to fold the mask and shift directly into the scale.
if (!FoldMaskAndShiftToScale(*CurDAG, N, C2->getZExtValue(), Shift, X, AM))
if (!FoldMaskAndShiftToScale(*CurDAG, N, Mask, Shift, X, AM))
return false;
// Try to swap the mask and shift to place shifts which can be done as
// a scale on the outside of the mask.
if (!FoldMaskedShiftToScaledMask(*CurDAG, N, C2->getZExtValue(),
Shift, X, AM))
if (!FoldMaskedShiftToScaledMask(*CurDAG, N, Mask, Shift, X, AM))
return false;
break;
}