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give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256/257

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114508 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-09-21 23:59:42 +00:00
parent b72d53d8ef
commit 93c4a5bef7
4 changed files with 22 additions and 10 deletions
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1
lib/Target/X86/X86ISelDAGToDAG.cpp
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@ -1180,7 +1180,6 @@ bool X86DAGToDAGISel::SelectAddr(SDNode *Parent, SDValue N, SDValue &Base,
Parent->getOpcode() != X86ISD::FP_TO_INT16_IN_MEM &&
Parent->getOpcode() != X86ISD::FP_TO_INT32_IN_MEM &&
Parent->getOpcode() != X86ISD::FP_TO_INT64_IN_MEM &&
Parent->getOpcode() != X86ISD::LCMPXCHG_DAG &&
Parent->getOpcode() != X86ISD::FST) {
unsigned AddrSpace =
cast<MemSDNode>(Parent)->getPointerInfo().getAddrSpace();

10
lib/Target/X86/X86ISelLowering.cpp
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@ -8490,7 +8490,7 @@ SDValue X86TargetLowering::LowerMEMBARRIER(SDValue Op, SelectionDAG &DAG) const{
SDValue X86TargetLowering::LowerCMP_SWAP(SDValue Op, SelectionDAG &DAG) const {
EVT T = Op.getValueType();
DebugLoc dl = Op.getDebugLoc();
DebugLoc DL = Op.getDebugLoc();
unsigned Reg = 0;
unsigned size = 0;
switch(T.getSimpleVT().SimpleTy) {
@ -8504,7 +8504,7 @@ SDValue X86TargetLowering::LowerCMP_SWAP(SDValue Op, SelectionDAG &DAG) const {
Reg = X86::RAX; size = 8;
break;
}
SDValue cpIn = DAG.getCopyToReg(Op.getOperand(0), dl, Reg,
SDValue cpIn = DAG.getCopyToReg(Op.getOperand(0), DL, Reg,
Op.getOperand(2), SDValue());
SDValue Ops[] = { cpIn.getValue(0),
Op.getOperand(1),
@ -8512,9 +8512,11 @@ SDValue X86TargetLowering::LowerCMP_SWAP(SDValue Op, SelectionDAG &DAG) const {
DAG.getTargetConstant(size, MVT::i8),
cpIn.getValue(1) };
SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
SDValue Result = DAG.getNode(X86ISD::LCMPXCHG_DAG, dl, Tys, Ops, 5);
MachineMemOperand *MMO = cast<AtomicSDNode>(Op)->getMemOperand();
SDValue Result = DAG.getMemIntrinsicNode(X86ISD::LCMPXCHG_DAG, DL, Tys,
Ops, 5, T, MMO);
SDValue cpOut =
DAG.getCopyFromReg(Result.getValue(0), dl, Reg, T, Result.getValue(1));
DAG.getCopyFromReg(Result.getValue(0), DL, Reg, T, Result.getValue(1));
return cpOut;
}

10
lib/Target/X86/X86ISelLowering.h
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@ -214,10 +214,6 @@ namespace llvm {
/// operand #3 optional in flag
TC_RETURN,
// LCMPXCHG_DAG, LCMPXCHG8_DAG - Compare and swap.
LCMPXCHG_DAG,
LCMPXCHG8_DAG,
// FNSTCW16m - Store FP control world into i16 memory.
FNSTCW16m,
@ -309,7 +305,11 @@ namespace llvm {
MEMBARRIER,
MFENCE,
SFENCE,
LFENCE
LFENCE,
// LCMPXCHG_DAG, LCMPXCHG8_DAG - Compare and swap.
LCMPXCHG_DAG,
LCMPXCHG8_DAG
// WARNING: Do not add anything in the end unless you want the node to
// have memop! In fact, starting from ATOMADD64_DAG all opcodes will be

11
test/CodeGen/X86/atomic_op.ll
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@ -109,6 +109,17 @@ entry:
ret void
}
define void @test2(i32 addrspace(256)* nocapture %P) nounwind {
entry:
; CHECK: lock
; CEHCK: cmpxchgl %{{.*}}, %gs:(%{{.*}})
%0 = tail call i32 @llvm.atomic.cmp.swap.i32.p256i32(i32 addrspace(256)* %P, i32 0, i32 1)
ret void
}
declare i32 @llvm.atomic.cmp.swap.i32.p256i32(i32 addrspace(256)* nocapture, i32, i32) nounwind
declare i32 @llvm.atomic.load.add.i32.p0i32(i32*, i32) nounwind
declare i32 @llvm.atomic.load.sub.i32.p0i32(i32*, i32) nounwind