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Use LiveRangeQuery in ScheduleDAGInstrs.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157144 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-05-20 02:44:38 +00:00
parent e1b93d2e86
commit 93e29ce066
1 changed files with 3 additions and 11 deletions
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14
lib/CodeGen/ScheduleDAGInstrs.cpp
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@ -445,19 +445,11 @@ void ScheduleDAGInstrs::addVRegUseDeps(SUnit *SU, unsigned OperIdx) {
// Lookup this operand's reaching definition.
assert(LIS && "vreg dependencies requires LiveIntervals");
SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot();
LiveInterval *LI = &LIS->getInterval(Reg);
VNInfo *VNI = LI->getVNInfoBefore(UseIdx);
LiveRangeQuery LRQ(LIS->getInterval(Reg), LIS->getInstructionIndex(MI));
VNInfo *VNI = LRQ.valueIn();
// Special case: An early-clobber tied operand reads and writes the
// register one slot early. e.g. InlineAsm.
//
// FIXME: Same special case is in shrinkToUses. Hide under an API.
if (SlotIndex::isSameInstr(VNI->def, UseIdx)) {
UseIdx = VNI->def;
VNI = LI->getVNInfoBefore(UseIdx);
}
// VNI will be valid because MachineOperand::readsReg() is checked by caller.
assert(VNI && "No value to read by operand");
MachineInstr *Def = LIS->getInstructionFromIndex(VNI->def);
// Phis and other noninstructions (after coalescing) have a NULL Def.
if (Def) {