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Add MachineInstr::tieOperands, remove setIsTied().
Manage tied operands entirely internally to MachineInstr. This makes it possible to change the representation of tied operands, as I will do shortly. The constraint that tied uses and defs must be in the same order was too restrictive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163021 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -782,6 +782,14 @@ public:
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const TargetInstrInfo *TII,
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const TargetRegisterInfo *TRI) const;
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/// tieOperands - Add a tie between the register operands at DefIdx and
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/// UseIdx. The tie will cause the register allocator to ensure that the two
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/// operands are assigned the same physical register.
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///
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/// Tied operands are managed automatically for explicit operands in the
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/// MCInstrDesc. This method is for exceptional cases like inline asm.
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void tieOperands(unsigned DefIdx, unsigned UseIdx);
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/// findTiedOperandIdx - Given the index of a tied register operand, find the
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/// operand it is tied to. Defs are tied to uses and vice versa. Returns the
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/// index of the tied operand which must exist.
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@ -942,9 +950,11 @@ private:
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/// untieRegOperand - Break any tie involving OpIdx.
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void untieRegOperand(unsigned OpIdx) {
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const MachineOperand &MO = getOperand(OpIdx);
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if (MO.isReg() && MO.isTied())
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getOperand(findTiedOperandIdx(OpIdx)).setIsTied(false);
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MachineOperand &MO = getOperand(OpIdx);
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if (MO.isReg() && MO.isTied()) {
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getOperand(findTiedOperandIdx(OpIdx)).IsTied = false;
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MO.IsTied = false;
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}
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}
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/// addImplicitDefUseOperands - Add all implicit def and use operands to
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@ -390,11 +390,6 @@ public:
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IsEarlyClobber = Val;
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}
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void setIsTied(bool Val = true) {
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assert(isReg() && "Wrong MachineOperand accessor");
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IsTied = Val;
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}
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void setIsDebug(bool Val = true) {
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assert(isReg() && IsDef && "Wrong MachineOperand accessor");
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IsDebug = Val;
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@ -728,12 +728,8 @@ void MachineInstr::addOperand(const MachineOperand &Op) {
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// Set the IsTied bit if MC indicates this use is tied to a def.
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if (Operands[OpNo].isUse()) {
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int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO);
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if (DefIdx != -1) {
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MachineOperand &DefMO = getOperand(DefIdx);
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assert(DefMO.isDef() && "Use tied to operand that isn't a def");
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DefMO.IsTied = true;
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Operands[OpNo].IsTied = true;
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}
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if (DefIdx != -1)
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tieOperands(DefIdx, OpNo);
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}
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// If the register operand is flagged as early, mark the operand as such.
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if (MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1)
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@ -1140,6 +1136,20 @@ int MachineInstr::findFirstPredOperandIdx() const {
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return -1;
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}
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/// Mark operands at DefIdx and UseIdx as tied to each other.
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void MachineInstr::tieOperands(unsigned DefIdx, unsigned UseIdx) {
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assert(DefIdx < UseIdx && "Tied defs must precede the use");
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MachineOperand &DefMO = getOperand(DefIdx);
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MachineOperand &UseMO = getOperand(UseIdx);
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assert(DefMO.isDef() && "DefIdx must be a def operand");
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assert(UseMO.isUse() && "UseIdx must be a use operand");
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assert(!DefMO.isTied() && "Def is already tied to another use");
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assert(!UseMO.isTied() && "Use is already tied to another def");
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DefMO.IsTied = true;
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UseMO.IsTied = true;
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}
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/// Given the index of a tied register operand, find the operand it is tied to.
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/// Defs are tied to uses and vice versa. Returns the index of the tied operand
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/// which must exist.
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@ -945,12 +945,8 @@ EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
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if (InlineAsm::isUseOperandTiedToDef(Flags, DefGroup)) {
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unsigned DefIdx = GroupIdx[DefGroup] + 1;
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unsigned UseIdx = GroupIdx.back() + 1;
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for (unsigned j = 0; j != NumVals; ++j) {
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assert(!MI->getOperand(DefIdx + j).isTied() &&
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"Def is already tied to another use");
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MI->getOperand(DefIdx + j).setIsTied();
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MI->getOperand(UseIdx + j).setIsTied();
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}
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for (unsigned j = 0; j != NumVals; ++j)
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MI->tieOperands(DefIdx + j, UseIdx + j);
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}
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}
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break;
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