From 94ccee2222fa841d7ca3b13305934a570d90767f Mon Sep 17 00:00:00 2001 From: Akira Hatanaka Date: Mon, 4 Jun 2012 17:46:29 +0000 Subject: [PATCH] Fix a bug in MipsTargetLowering::LowerLOAD. A shift-right-logical node is inserted after the shift-left-logical node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157937 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsISelLowering.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index d44bdca03d7..1793a0fa218 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -2144,7 +2144,8 @@ SDValue MipsTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const { DebugLoc DL = LD->getDebugLoc(); SDValue Const32 = DAG.getConstant(32, MVT::i32); SDValue SLL = DAG.getNode(ISD::SHL, DL, MVT::i64, LWR, Const32); - SDValue Ops[] = { SLL, LWR.getValue(1) }; + SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i64, SLL, Const32); + SDValue Ops[] = { SRL, LWR.getValue(1) }; return DAG.getMergeValues(Ops, 2, DL); }