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Record constants that need to be emitted in the assembly code.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1010 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vikram S. Adve
2001-10-28 21:46:23 +00:00
parent d0d79c01b4
commit 94e40ef064
2 changed files with 38 additions and 80 deletions
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59
lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
View File

@@ -17,6 +17,8 @@
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include "llvm/Target/MachineRegInfo.h" #include "llvm/Target/MachineRegInfo.h"
#include "llvm/ConstPoolVals.h" #include "llvm/ConstPoolVals.h"
#include "llvm/Method.h"
#include "llvm/BasicBlock.h"
#include "llvm/Instruction.h" #include "llvm/Instruction.h"
#include "llvm/Type.h" #include "llvm/Type.h"
#include "llvm/iMemory.h" #include "llvm/iMemory.h"
@@ -299,6 +301,8 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
const MachineInstrDescriptor& instrDesc = const MachineInstrDescriptor& instrDesc =
target.getInstrInfo().getDescriptor(minstr->getOpCode()); target.getInstrInfo().getDescriptor(minstr->getOpCode());
Method* method = vmInstr->getParent()->getParent();
for (unsigned op=0; op < minstr->getNumOperands(); op++) for (unsigned op=0; op < minstr->getNumOperands(); op++)
{ {
const MachineOperand& mop = minstr->getOperand(op); const MachineOperand& mop = minstr->getOperand(op);
@@ -330,8 +334,14 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
constantThatMustBeLoaded = true; // load is generated below constantThatMustBeLoaded = true; // load is generated below
else else
minstr->SetMachineOperand(op, opType, immedValue); minstr->SetMachineOperand(op, opType, immedValue);
}
if (constantThatMustBeLoaded)
{ // register the value so it is emitted in the assembly
method->getMachineCode().addToConstantPool(
cast<ConstPoolVal>(opValue));
}
}
if (constantThatMustBeLoaded || isa<GlobalValue>(opValue)) if (constantThatMustBeLoaded || isa<GlobalValue>(opValue))
{ // opValue is a constant that must be explicitly loaded into a reg. { // opValue is a constant that must be explicitly loaded into a reg.
TmpInstruction* tmpReg = InsertCodeToLoadConstant(opValue, vmInstr, TmpInstruction* tmpReg = InsertCodeToLoadConstant(opValue, vmInstr,
@@ -355,50 +365,19 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
if (isa<ConstPoolVal>(minstr->getImplicitRef(i)) || if (isa<ConstPoolVal>(minstr->getImplicitRef(i)) ||
isa<GlobalValue>(minstr->getImplicitRef(i))) isa<GlobalValue>(minstr->getImplicitRef(i)))
{ {
Value* oldVal = minstr->getImplicitRef(i);
TmpInstruction* tmpReg = TmpInstruction* tmpReg =
InsertCodeToLoadConstant(minstr->getImplicitRef(i), vmInstr, InsertCodeToLoadConstant(oldVal, vmInstr, loadConstVec, target);
loadConstVec, target);
minstr->setImplicitRef(i, tmpReg); minstr->setImplicitRef(i, tmpReg);
if (isa<ConstPoolVal>(oldVal))
{ // register the value so it is emitted in the assembly
method->getMachineCode().addToConstantPool(
cast<ConstPoolVal>(oldVal));
}
} }
return loadConstVec; return loadConstVec;
} }
#undef SAVE_TO_MOVE_BACK_TO_SPARCISSCPP
#ifdef SAVE_TO_MOVE_BACK_TO_SPARCISSCPP
unsigned
FixConstantOperands(const InstructionNode* vmInstrNode,
TargetMachine& target)
{
Instruction* vmInstr = vmInstrNode->getInstruction();
MachineCodeForVMInstr& mvec = vmInstr->getMachineInstrVec();
for (unsigned i=0; i < mvec.size(); i++)
{
vector<MachineInsr*> loadConstVec =
FixConstantOperandsForInstr(mvec[i], target);
}
//
// Finally, inserted the generated instructions in the vector
// to be returned.
//
unsigned numNew = loadConstVec.size();
if (numNew > 0)
{
// Insert the new instructions *before* the old ones by moving
// the old ones over `numNew' positions (last-to-first, of course!).
// We do check *after* returning that we did not exceed the vector mvec.
for (int i=numInstr-1; i >= 0; i--)
mvec[i+numNew] = mvec[i];
for (unsigned i=0; i < numNew; i++)
mvec[i] = loadConstVec[i];
}
return (numInstr + numNew);
}
#endif SAVE_TO_MOVE_BACK_TO_SPARCISSCPP

59
lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp
View File

@@ -17,6 +17,8 @@
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include "llvm/Target/MachineRegInfo.h" #include "llvm/Target/MachineRegInfo.h"
#include "llvm/ConstPoolVals.h" #include "llvm/ConstPoolVals.h"
#include "llvm/Method.h"
#include "llvm/BasicBlock.h"
#include "llvm/Instruction.h" #include "llvm/Instruction.h"
#include "llvm/Type.h" #include "llvm/Type.h"
#include "llvm/iMemory.h" #include "llvm/iMemory.h"
@@ -299,6 +301,8 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
const MachineInstrDescriptor& instrDesc = const MachineInstrDescriptor& instrDesc =
target.getInstrInfo().getDescriptor(minstr->getOpCode()); target.getInstrInfo().getDescriptor(minstr->getOpCode());
Method* method = vmInstr->getParent()->getParent();
for (unsigned op=0; op < minstr->getNumOperands(); op++) for (unsigned op=0; op < minstr->getNumOperands(); op++)
{ {
const MachineOperand& mop = minstr->getOperand(op); const MachineOperand& mop = minstr->getOperand(op);
@@ -330,8 +334,14 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
constantThatMustBeLoaded = true; // load is generated below constantThatMustBeLoaded = true; // load is generated below
else else
minstr->SetMachineOperand(op, opType, immedValue); minstr->SetMachineOperand(op, opType, immedValue);
}
if (constantThatMustBeLoaded)
{ // register the value so it is emitted in the assembly
method->getMachineCode().addToConstantPool(
cast<ConstPoolVal>(opValue));
}
}
if (constantThatMustBeLoaded || isa<GlobalValue>(opValue)) if (constantThatMustBeLoaded || isa<GlobalValue>(opValue))
{ // opValue is a constant that must be explicitly loaded into a reg. { // opValue is a constant that must be explicitly loaded into a reg.
TmpInstruction* tmpReg = InsertCodeToLoadConstant(opValue, vmInstr, TmpInstruction* tmpReg = InsertCodeToLoadConstant(opValue, vmInstr,
@@ -355,50 +365,19 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
if (isa<ConstPoolVal>(minstr->getImplicitRef(i)) || if (isa<ConstPoolVal>(minstr->getImplicitRef(i)) ||
isa<GlobalValue>(minstr->getImplicitRef(i))) isa<GlobalValue>(minstr->getImplicitRef(i)))
{ {
Value* oldVal = minstr->getImplicitRef(i);
TmpInstruction* tmpReg = TmpInstruction* tmpReg =
InsertCodeToLoadConstant(minstr->getImplicitRef(i), vmInstr, InsertCodeToLoadConstant(oldVal, vmInstr, loadConstVec, target);
loadConstVec, target);
minstr->setImplicitRef(i, tmpReg); minstr->setImplicitRef(i, tmpReg);
if (isa<ConstPoolVal>(oldVal))
{ // register the value so it is emitted in the assembly
method->getMachineCode().addToConstantPool(
cast<ConstPoolVal>(oldVal));
}
} }
return loadConstVec; return loadConstVec;
} }
#undef SAVE_TO_MOVE_BACK_TO_SPARCISSCPP
#ifdef SAVE_TO_MOVE_BACK_TO_SPARCISSCPP
unsigned
FixConstantOperands(const InstructionNode* vmInstrNode,
TargetMachine& target)
{
Instruction* vmInstr = vmInstrNode->getInstruction();
MachineCodeForVMInstr& mvec = vmInstr->getMachineInstrVec();
for (unsigned i=0; i < mvec.size(); i++)
{
vector<MachineInsr*> loadConstVec =
FixConstantOperandsForInstr(mvec[i], target);
}
//
// Finally, inserted the generated instructions in the vector
// to be returned.
//
unsigned numNew = loadConstVec.size();
if (numNew > 0)
{
// Insert the new instructions *before* the old ones by moving
// the old ones over `numNew' positions (last-to-first, of course!).
// We do check *after* returning that we did not exceed the vector mvec.
for (int i=numInstr-1; i >= 0; i--)
mvec[i+numNew] = mvec[i];
for (unsigned i=0; i < numNew; i++)
mvec[i] = loadConstVec[i];
}
return (numInstr + numNew);
}
#endif SAVE_TO_MOVE_BACK_TO_SPARCISSCPP