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Disable switch lowering for targets based on the selection dag isel,
letting the code generator handle them directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27539 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -81,9 +81,6 @@ bool AlphaTargetMachine::addPassesToEmitFile(PassManager &PM,
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// FIXME: Implement the invoke/unwind instructions!
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PM.add(createLowerInvokePass());
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// FIXME: Implement the switch instruction in the instruction selector!
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PM.add(createLowerSwitchPass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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@ -119,9 +116,6 @@ void AlphaJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
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// FIXME: Implement the invoke/unwind instructions!
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PM.add(createLowerInvokePass());
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// FIXME: Implement the switch instruction in the instruction selector!
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PM.add(createLowerSwitchPass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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@ -96,9 +96,6 @@ bool IA64TargetMachine::addPassesToEmitFile(PassManager &PM,
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PM.add(createLowerInvokePass(704, 16)); // on ia64 linux, jmpbufs are 704
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// bytes and must be 16byte aligned
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// FIXME: Implement the switch instruction in the instruction selector!
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PM.add(createLowerSwitchPass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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@ -93,9 +93,6 @@ bool PPCTargetMachine::addPassesToEmitFile(PassManager &PM,
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// Clean up after other passes, e.g. merging critical edges.
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if (!Fast) PM.add(createCFGSimplificationPass());
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// FIXME: Implement the switch instruction in the instruction selector!
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PM.add(createLowerSwitchPass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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@ -147,9 +144,6 @@ void PPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
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// Clean up after other passes, e.g. merging critical edges.
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PM.add(createCFGSimplificationPass());
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// FIXME: Implement the switch instruction in the instruction selector!
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PM.add(createLowerSwitchPass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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@ -72,9 +72,6 @@ bool SparcTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
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// FIXME: implement the invoke/unwind instructions!
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PM.add(createLowerInvokePass());
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// FIXME: implement the switch instruction in the instruction selector.
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PM.add(createLowerSwitchPass());
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// Print LLVM code input to instruction selector:
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if (PrintMachineCode)
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PM.add(new PrintFunctionPass());
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@ -36,8 +36,6 @@ namespace {
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cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
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cl::desc("Disable the X86 asm printer, for use "
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"when profiling the code generator."));
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cl::opt<bool> DisableLowerSwitch("disable-lower-switch", cl::Hidden,
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cl::desc("Disable the LowerSwitch pass"));
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// Register the target.
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RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)");
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}
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@ -100,10 +98,6 @@ bool X86TargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
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// FIXME: Implement the invoke/unwind instructions!
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PM.add(createLowerInvokePass());
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// FIXME: Implement the switch instruction in the instruction selector!
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if (!DisableLowerSwitch)
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PM.add(createLowerSwitchPass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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@ -169,10 +163,6 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
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// FIXME: Implement the invoke/unwind instructions!
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PM.add(createLowerInvokePass());
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// FIXME: Implement the switch instruction in the instruction selector!
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if (!DisableLowerSwitch)
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PM.add(createLowerSwitchPass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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