Disable switch lowering for targets based on the selection dag isel,

letting the code generator handle them directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27539 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nate Begeman 2006-04-08 19:46:55 +00:00
parent 79d9a88165
commit 957e1674e7
5 changed files with 0 additions and 28 deletions

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@ -81,9 +81,6 @@ bool AlphaTargetMachine::addPassesToEmitFile(PassManager &PM,
// FIXME: Implement the invoke/unwind instructions!
PM.add(createLowerInvokePass());
// FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass());
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
@ -119,9 +116,6 @@ void AlphaJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// FIXME: Implement the invoke/unwind instructions!
PM.add(createLowerInvokePass());
// FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass());
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());

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@ -96,9 +96,6 @@ bool IA64TargetMachine::addPassesToEmitFile(PassManager &PM,
PM.add(createLowerInvokePass(704, 16)); // on ia64 linux, jmpbufs are 704
// bytes and must be 16byte aligned
// FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass());
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());

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@ -93,9 +93,6 @@ bool PPCTargetMachine::addPassesToEmitFile(PassManager &PM,
// Clean up after other passes, e.g. merging critical edges.
if (!Fast) PM.add(createCFGSimplificationPass());
// FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass());
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
@ -147,9 +144,6 @@ void PPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// Clean up after other passes, e.g. merging critical edges.
PM.add(createCFGSimplificationPass());
// FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass());
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());

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@ -72,9 +72,6 @@ bool SparcTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
// FIXME: implement the invoke/unwind instructions!
PM.add(createLowerInvokePass());
// FIXME: implement the switch instruction in the instruction selector.
PM.add(createLowerSwitchPass());
// Print LLVM code input to instruction selector:
if (PrintMachineCode)
PM.add(new PrintFunctionPass());

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@ -36,8 +36,6 @@ namespace {
cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
cl::desc("Disable the X86 asm printer, for use "
"when profiling the code generator."));
cl::opt<bool> DisableLowerSwitch("disable-lower-switch", cl::Hidden,
cl::desc("Disable the LowerSwitch pass"));
// Register the target.
RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)");
}
@ -100,10 +98,6 @@ bool X86TargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
// FIXME: Implement the invoke/unwind instructions!
PM.add(createLowerInvokePass());
// FIXME: Implement the switch instruction in the instruction selector!
if (!DisableLowerSwitch)
PM.add(createLowerSwitchPass());
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
@ -169,10 +163,6 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// FIXME: Implement the invoke/unwind instructions!
PM.add(createLowerInvokePass());
// FIXME: Implement the switch instruction in the instruction selector!
if (!DisableLowerSwitch)
PM.add(createLowerSwitchPass());
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());