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Use the appropriate 64-bit register description file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15922 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -18,7 +18,7 @@ include "../Target.td"
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// Register File Description
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//===----------------------------------------------------------------------===//
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include "PPC32RegisterInfo.td"
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include "PPC64RegisterInfo.td"
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include "PowerPCInstrInfo.td"
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def PowerPCInstrInfo : InstrInfo {
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