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Add an assertion

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11830 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2004-02-25 19:37:44 +00:00
parent 87124425d0
commit 95c34f2efd
1 changed files with 1 additions and 0 deletions
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lib/CodeGen/RegAllocLinearScan.cpp
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@@ -378,6 +378,7 @@ void RA::assignRegOrStackSlotAtInterval(IntervalPtrs::value_type cur)
} }
DEBUG(std::cerr << "\t\tregister with min weight: " DEBUG(std::cerr << "\t\tregister with min weight: "
<< mri_->getName(minReg) << " (" << minWeight << ")\n"); << mri_->getName(minReg) << " (" << minWeight << ")\n");
assert(minReg != 0 && "Didn't find a register to spill?");
// if the current has the minimum weight, we need to modify it, // if the current has the minimum weight, we need to modify it,
// push it back in unhandled and let the linear scan algorithm run // push it back in unhandled and let the linear scan algorithm run