mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-06 06:33:24 +00:00
Changes to use operand constraints to process two-address instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31453 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
fe0b81759d
commit
95f6edeff5
@ -126,8 +126,13 @@ void ScheduleDAG::BuildSchedUnits() {
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if (MainNode->isTargetOpcode()) {
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if (MainNode->isTargetOpcode()) {
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unsigned Opc = MainNode->getTargetOpcode();
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unsigned Opc = MainNode->getTargetOpcode();
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if (TII->isTwoAddrInstr(Opc))
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for (unsigned i = 0, ee = TII->getNumOperands(Opc); i != ee; ++i) {
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SU->isTwoAddress = true;
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if (TII->getOperandConstraint(Opc, i,
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TargetInstrInfo::TIED_TO) != -1) {
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SU->isTwoAddress = true;
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break;
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}
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}
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if (TII->isCommutableInstr(Opc))
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if (TII->isCommutableInstr(Opc))
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SU->isCommutable = true;
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SU->isCommutable = true;
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}
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}
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@ -210,7 +215,7 @@ void ScheduleDAG::CalculateHeights() {
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/// CountResults - The results of target nodes have register or immediate
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/// CountResults - The results of target nodes have register or immediate
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/// operands first, then an optional chain, and optional flag operands (which do
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/// operands first, then an optional chain, and optional flag operands (which do
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/// not go into the machine instrs.)
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/// not go into the machine instrs.)
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static unsigned CountResults(SDNode *Node) {
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unsigned ScheduleDAG::CountResults(SDNode *Node) {
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unsigned N = Node->getNumValues();
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unsigned N = Node->getNumValues();
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while (N && Node->getValueType(N - 1) == MVT::Flag)
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while (N && Node->getValueType(N - 1) == MVT::Flag)
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--N;
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--N;
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@ -222,7 +227,7 @@ static unsigned CountResults(SDNode *Node) {
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/// CountOperands The inputs to target nodes have any actual inputs first,
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/// CountOperands The inputs to target nodes have any actual inputs first,
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/// followed by an optional chain operand, then flag operands. Compute the
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/// followed by an optional chain operand, then flag operands. Compute the
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/// number of actual operands that will go into the machine instr.
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/// number of actual operands that will go into the machine instr.
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static unsigned CountOperands(SDNode *Node) {
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unsigned ScheduleDAG::CountOperands(SDNode *Node) {
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unsigned N = Node->getNumOperands();
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unsigned N = Node->getNumOperands();
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while (N && Node->getOperand(N - 1).getValueType() == MVT::Flag)
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while (N && Node->getOperand(N - 1).getValueType() == MVT::Flag)
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--N;
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--N;
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@ -98,7 +98,7 @@ void ScheduleDAGList::Schedule() {
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// Build scheduling units.
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// Build scheduling units.
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BuildSchedUnits();
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BuildSchedUnits();
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AvailableQueue->initNodes(SUnits);
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AvailableQueue->initNodes(SUnitMap, SUnits);
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ListScheduleTopDown();
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ListScheduleTopDown();
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@ -331,7 +331,8 @@ public:
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LatencyPriorityQueue() : Queue(latency_sort(this)) {
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LatencyPriorityQueue() : Queue(latency_sort(this)) {
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}
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}
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void initNodes(std::vector<SUnit> &sunits) {
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void initNodes(std::map<SDNode*, SUnit*> &sumap,
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std::vector<SUnit> &sunits) {
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SUnits = &sunits;
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SUnits = &sunits;
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// Calculate node priorities.
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// Calculate node priorities.
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CalculatePriorities();
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CalculatePriorities();
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@ -95,7 +95,7 @@ void ScheduleDAGRRList::Schedule() {
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CalculateDepths();
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CalculateDepths();
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CalculateHeights();
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CalculateHeights();
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AvailableQueue->initNodes(SUnits);
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AvailableQueue->initNodes(SUnitMap, SUnits);
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// Execute the actual scheduling loop Top-Down or Bottom-Up as appropriate.
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// Execute the actual scheduling loop Top-Down or Bottom-Up as appropriate.
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if (isBottomUp)
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if (isBottomUp)
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@ -115,7 +115,7 @@ void ScheduleDAGRRList::Schedule() {
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EmitSchedule();
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EmitSchedule();
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}
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}
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/// CommuteNodesToReducePressure - Is a node is two-address and commutable, and
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/// CommuteNodesToReducePressure - If a node is two-address and commutable, and
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/// it is not the last use of its first operand, add it to the CommuteSet if
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/// it is not the last use of its first operand, add it to the CommuteSet if
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/// possible. It will be commuted when it is translated to a MI.
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/// possible. It will be commuted when it is translated to a MI.
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void ScheduleDAGRRList::CommuteNodesToReducePressure() {
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void ScheduleDAGRRList::CommuteNodesToReducePressure() {
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@ -123,23 +123,38 @@ void ScheduleDAGRRList::CommuteNodesToReducePressure() {
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for (unsigned i = Sequence.size()-1; i != 0; --i) { // Ignore first node.
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for (unsigned i = Sequence.size()-1; i != 0; --i) { // Ignore first node.
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SUnit *SU = Sequence[i];
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SUnit *SU = Sequence[i];
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if (!SU) continue;
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if (!SU) continue;
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if (SU->isTwoAddress && SU->isCommutable) {
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if (SU->isCommutable) {
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SDNode *OpN = SU->Node->getOperand(0).Val;
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unsigned Opc = SU->Node->getTargetOpcode();
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SUnit *OpSU = SUnitMap[OpN];
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unsigned NumRes = CountResults(SU->Node);
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if (OpSU && OperandSeen.count(OpSU) == 1) {
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unsigned NumOps = CountOperands(SU->Node);
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// Ok, so SU is not the last use of OpSU, but SU is two-address so
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for (unsigned j = 0; j != NumOps; ++j) {
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// it will clobber OpSU. Try to commute it if possible.
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if (TII->getOperandConstraint(Opc, j+NumRes,
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bool DoCommute = true;
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TargetInstrInfo::TIED_TO) == -1)
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for (unsigned j = 1, e = SU->Node->getNumOperands(); j != e; ++j) {
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continue;
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OpN = SU->Node->getOperand(j).Val;
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OpSU = SUnitMap[OpN];
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SDNode *OpN = SU->Node->getOperand(j).Val;
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if (OpSU && OperandSeen.count(OpSU) == 1) {
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SUnit *OpSU = SUnitMap[OpN];
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DoCommute = false;
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if (OpSU && OperandSeen.count(OpSU) == 1) {
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break;
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// Ok, so SU is not the last use of OpSU, but SU is two-address so
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// it will clobber OpSU. Try to commute SU if no other source operands
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// are live below.
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bool DoCommute = true;
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for (unsigned k = 0; k < NumOps; ++k) {
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if (k != j) {
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OpN = SU->Node->getOperand(k).Val;
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OpSU = SUnitMap[OpN];
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if (OpSU && OperandSeen.count(OpSU) == 1) {
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DoCommute = false;
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break;
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}
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}
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}
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}
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if (DoCommute)
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CommuteSet.insert(SU->Node);
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}
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}
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if (DoCommute)
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CommuteSet.insert(SU->Node);
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// Only look at the first use&def node for now.
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break;
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}
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}
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}
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}
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@ -411,7 +426,8 @@ namespace {
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RegReductionPriorityQueue() :
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RegReductionPriorityQueue() :
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Queue(SF(this)) {}
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Queue(SF(this)) {}
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virtual void initNodes(std::vector<SUnit> &sunits) {}
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virtual void initNodes(std::map<SDNode*, SUnit*> &sumap,
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std::vector<SUnit> &sunits) {}
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virtual void releaseState() {}
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virtual void releaseState() {}
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virtual int getSethiUllmanNumber(unsigned NodeNum) const {
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virtual int getSethiUllmanNumber(unsigned NodeNum) const {
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@ -434,21 +450,32 @@ namespace {
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Queue.pop();
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Queue.pop();
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return V;
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return V;
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}
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}
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virtual bool isDUOperand(const SUnit *SU1, const SUnit *SU2) {
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return false;
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}
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};
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};
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template<class SF>
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template<class SF>
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class VISIBILITY_HIDDEN BURegReductionPriorityQueue
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class VISIBILITY_HIDDEN BURegReductionPriorityQueue
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: public RegReductionPriorityQueue<SF> {
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: public RegReductionPriorityQueue<SF> {
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// SUnitMap SDNode to SUnit mapping (n -> 1).
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std::map<SDNode*, SUnit*> *SUnitMap;
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// SUnits - The SUnits for the current graph.
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// SUnits - The SUnits for the current graph.
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const std::vector<SUnit> *SUnits;
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const std::vector<SUnit> *SUnits;
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// SethiUllmanNumbers - The SethiUllman number for each node.
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// SethiUllmanNumbers - The SethiUllman number for each node.
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std::vector<int> SethiUllmanNumbers;
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std::vector<int> SethiUllmanNumbers;
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const TargetInstrInfo *TII;
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public:
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public:
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BURegReductionPriorityQueue() {}
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BURegReductionPriorityQueue(const TargetInstrInfo *tii)
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: TII(tii) {}
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void initNodes(std::vector<SUnit> &sunits) {
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void initNodes(std::map<SDNode*, SUnit*> &sumap,
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std::vector<SUnit> &sunits) {
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SUnitMap = &sumap;
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SUnits = &sunits;
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SUnits = &sunits;
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// Add pseudo dependency edges for two-address nodes.
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// Add pseudo dependency edges for two-address nodes.
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AddPseudoTwoAddrDeps();
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AddPseudoTwoAddrDeps();
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@ -466,7 +493,21 @@ namespace {
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return SethiUllmanNumbers[NodeNum];
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return SethiUllmanNumbers[NodeNum];
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}
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}
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bool isDUOperand(const SUnit *SU1, const SUnit *SU2) {
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unsigned Opc = SU1->Node->getTargetOpcode();
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unsigned NumRes = ScheduleDAG::CountResults(SU1->Node);
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unsigned NumOps = ScheduleDAG::CountOperands(SU1->Node);
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for (unsigned i = 0; i != NumOps; ++i) {
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if (TII->getOperandConstraint(Opc, i+NumRes,
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TargetInstrInfo::TIED_TO) == -1)
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continue;
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if (SU1->Node->getOperand(i).isOperand(SU2->Node))
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return true;
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}
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return false;
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}
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private:
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private:
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bool canClobber(SUnit *SU, SUnit *Op);
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void AddPseudoTwoAddrDeps();
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void AddPseudoTwoAddrDeps();
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void CalculatePriorities();
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void CalculatePriorities();
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int CalcNodePriority(const SUnit *SU);
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int CalcNodePriority(const SUnit *SU);
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@ -475,6 +516,9 @@ namespace {
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template<class SF>
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template<class SF>
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class TDRegReductionPriorityQueue : public RegReductionPriorityQueue<SF> {
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class TDRegReductionPriorityQueue : public RegReductionPriorityQueue<SF> {
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// SUnitMap SDNode to SUnit mapping (n -> 1).
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std::map<SDNode*, SUnit*> *SUnitMap;
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// SUnits - The SUnits for the current graph.
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// SUnits - The SUnits for the current graph.
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const std::vector<SUnit> *SUnits;
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const std::vector<SUnit> *SUnits;
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@ -484,7 +528,9 @@ namespace {
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public:
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public:
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TDRegReductionPriorityQueue() {}
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TDRegReductionPriorityQueue() {}
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void initNodes(std::vector<SUnit> &sunits) {
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void initNodes(std::map<SDNode*, SUnit*> &sumap,
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std::vector<SUnit> &sunits) {
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SUnitMap = &sumap;
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SUnits = &sunits;
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SUnits = &sunits;
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// Calculate node priorities.
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// Calculate node priorities.
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CalculatePriorities();
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CalculatePriorities();
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@ -563,13 +609,11 @@ bool bu_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const {
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// as a def&use operand is preferred.
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// as a def&use operand is preferred.
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if (LIsTarget && RIsTarget) {
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if (LIsTarget && RIsTarget) {
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if (left->isTwoAddress && !right->isTwoAddress) {
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if (left->isTwoAddress && !right->isTwoAddress) {
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SDNode *DUNode = left->Node->getOperand(0).Val;
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if (SPQ->isDUOperand(left, right))
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if (DUNode->isOperand(right->Node))
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LBonus += 2;
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LBonus += 2;
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}
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}
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if (!left->isTwoAddress && right->isTwoAddress) {
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if (!left->isTwoAddress && right->isTwoAddress) {
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SDNode *DUNode = right->Node->getOperand(0).Val;
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if (SPQ->isDUOperand(right, left))
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if (DUNode->isOperand(left->Node))
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RBonus += 2;
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RBonus += 2;
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}
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}
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}
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}
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@ -616,32 +660,70 @@ static bool isReachable(SUnit *SU, SUnit *TargetSU) {
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return Reached;
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return Reached;
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}
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}
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static SUnit *getDefUsePredecessor(SUnit *SU) {
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template<class SF>
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SDNode *DU = SU->Node->getOperand(0).Val;
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bool BURegReductionPriorityQueue<SF>::canClobber(SUnit *SU, SUnit *Op) {
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for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
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if (SU->isTwoAddress) {
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I != E; ++I) {
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unsigned Opc = SU->Node->getTargetOpcode();
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if (I->second) continue; // ignore chain preds
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unsigned NumRes = ScheduleDAG::CountResults(SU->Node);
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SUnit *PredSU = I->first;
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unsigned NumOps = ScheduleDAG::CountOperands(SU->Node);
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if (PredSU->Node == DU)
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for (unsigned i = 0; i != NumOps; ++i) {
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return PredSU;
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if (TII->getOperandConstraint(Opc, i+NumRes,
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TargetInstrInfo::TIED_TO) != -1) {
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SDNode *DU = SU->Node->getOperand(i).Val;
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if (Op == (*SUnitMap)[DU])
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return true;
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}
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}
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}
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}
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// Must be flagged.
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return NULL;
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}
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static bool canClobber(SUnit *SU, SUnit *Op) {
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if (SU->isTwoAddress)
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return Op == getDefUsePredecessor(SU);
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return false;
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return false;
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}
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}
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/// AddPseudoTwoAddrDeps - If two nodes share an operand and one of them uses
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/// AddPseudoTwoAddrDeps - If two nodes share an operand and one of them uses
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/// it as a def&use operand. Add a pseudo control edge from it to the other
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/// it as a def&use operand. Add a pseudo control edge from it to the other
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/// node (if it won't create a cycle) so the two-address one will be scheduled
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/// node (if it won't create a cycle) so the two-address one will be scheduled
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/// first (lower in the schedule).
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/// first (lower in the schedule).
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template<class SF>
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template<class SF>
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void BURegReductionPriorityQueue<SF>::AddPseudoTwoAddrDeps() {
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void BURegReductionPriorityQueue<SF>::AddPseudoTwoAddrDeps() {
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#if 1
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for (unsigned i = 0, e = SUnits->size(); i != e; ++i) {
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SUnit *SU = (SUnit *)&((*SUnits)[i]);
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if (!SU->isTwoAddress)
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continue;
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SDNode *Node = SU->Node;
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if (!Node->isTargetOpcode())
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continue;
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unsigned Opc = Node->getTargetOpcode();
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unsigned NumRes = ScheduleDAG::CountResults(Node);
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unsigned NumOps = ScheduleDAG::CountOperands(Node);
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for (unsigned j = 0; j != NumOps; ++j) {
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if (TII->getOperandConstraint(Opc, j+NumRes,
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TargetInstrInfo::TIED_TO) != -1) {
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SDNode *DU = SU->Node->getOperand(j).Val;
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SUnit *DUSU = (*SUnitMap)[DU];
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for (SUnit::succ_iterator I = DUSU->Succs.begin(),E = DUSU->Succs.end();
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I != E; ++I) {
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if (I->second) continue;
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SUnit *SuccSU = I->first;
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if (SuccSU != SU &&
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(!canClobber(SuccSU, DUSU) ||
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(!SU->isCommutable && SuccSU->isCommutable))){
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if (SuccSU->Depth == SU->Depth && !isReachable(SuccSU, SU)) {
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DEBUG(std::cerr << "Adding an edge from SU # " << SU->NodeNum
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<< " to SU #" << SuccSU->NodeNum << "\n");
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if (SU->addPred(SuccSU, true))
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SU->NumChainPredsLeft++;
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if (SuccSU->addSucc(SU, true))
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SuccSU->NumChainSuccsLeft++;
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}
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}
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}
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}
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}
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}
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#else
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for (unsigned i = 0, e = SUnits->size(); i != e; ++i) {
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for (unsigned i = 0, e = SUnits->size(); i != e; ++i) {
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SUnit *SU = (SUnit *)&((*SUnits)[i]);
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SUnit *SU = (SUnit *)&((*SUnits)[i]);
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SDNode *Node = SU->Node;
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SDNode *Node = SU->Node;
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@ -649,7 +731,7 @@ void BURegReductionPriorityQueue<SF>::AddPseudoTwoAddrDeps() {
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continue;
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continue;
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if (SU->isTwoAddress) {
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if (SU->isTwoAddress) {
|
||||||
SUnit *DUSU = getDefUsePredecessor(SU);
|
SUnit *DUSU = getDefUsePredecessor(SU, TII);
|
||||||
if (!DUSU) continue;
|
if (!DUSU) continue;
|
||||||
|
|
||||||
for (SUnit::succ_iterator I = DUSU->Succs.begin(), E = DUSU->Succs.end();
|
for (SUnit::succ_iterator I = DUSU->Succs.begin(), E = DUSU->Succs.end();
|
||||||
@ -657,7 +739,7 @@ void BURegReductionPriorityQueue<SF>::AddPseudoTwoAddrDeps() {
|
|||||||
if (I->second) continue;
|
if (I->second) continue;
|
||||||
SUnit *SuccSU = I->first;
|
SUnit *SuccSU = I->first;
|
||||||
if (SuccSU != SU &&
|
if (SuccSU != SU &&
|
||||||
(!canClobber(SuccSU, DUSU) ||
|
(!canClobber(SuccSU, DUSU, TII) ||
|
||||||
(!SU->isCommutable && SuccSU->isCommutable))){
|
(!SU->isCommutable && SuccSU->isCommutable))){
|
||||||
if (SuccSU->Depth == SU->Depth && !isReachable(SuccSU, SU)) {
|
if (SuccSU->Depth == SU->Depth && !isReachable(SuccSU, SU)) {
|
||||||
DEBUG(std::cerr << "Adding an edge from SU # " << SU->NodeNum
|
DEBUG(std::cerr << "Adding an edge from SU # " << SU->NodeNum
|
||||||
@ -671,6 +753,7 @@ void BURegReductionPriorityQueue<SF>::AddPseudoTwoAddrDeps() {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
/// CalcNodePriority - Priority is the Sethi Ullman number.
|
/// CalcNodePriority - Priority is the Sethi Ullman number.
|
||||||
@ -858,8 +941,9 @@ void TDRegReductionPriorityQueue<SF>::CalculatePriorities() {
|
|||||||
llvm::ScheduleDAG* llvm::createBURRListDAGScheduler(SelectionDAGISel *IS,
|
llvm::ScheduleDAG* llvm::createBURRListDAGScheduler(SelectionDAGISel *IS,
|
||||||
SelectionDAG *DAG,
|
SelectionDAG *DAG,
|
||||||
MachineBasicBlock *BB) {
|
MachineBasicBlock *BB) {
|
||||||
|
const TargetInstrInfo *TII = DAG->getTarget().getInstrInfo();
|
||||||
return new ScheduleDAGRRList(*DAG, BB, DAG->getTarget(), true,
|
return new ScheduleDAGRRList(*DAG, BB, DAG->getTarget(), true,
|
||||||
new BURegReductionPriorityQueue<bu_ls_rr_sort>());
|
new BURegReductionPriorityQueue<bu_ls_rr_sort>(TII));
|
||||||
}
|
}
|
||||||
|
|
||||||
llvm::ScheduleDAG* llvm::createTDRRListDAGScheduler(SelectionDAGISel *IS,
|
llvm::ScheduleDAG* llvm::createTDRRListDAGScheduler(SelectionDAGISel *IS,
|
||||||
|
Loading…
x
Reference in New Issue
Block a user